Abstract:
A system for rendering three-dimensional graphics for display on a display using bins, the system including a graphics rendering engine configured to receive information representative of three-dimensional (3-D) objects in an object space and to render an image for display on the display, the graphics rendering engine including a processor, a pixel shader configured to perform rendering operations, and a programmable vertex shader configured to perform rendering operations, wherein the graphics rendering engine is configured to perform rendering operations and to compute locations of vertices of polygons corresponding to the 3-D objects.
Abstract:
A graphics processing system comprises a command processing engine capable of processing pixel command threads and vertex command threads. The command processing engine is coupled to both a renderer and a scan converter. Upon completing processing of a command thread, which may comprise a pixel command thread or a vertex command thread, the command engine provides the command thread to either the renderer or the scan converter.
Abstract:
A device and method for controlling generation of a final pixel utilizes a conditional statement, referred to as an IF_NEIGHBOR statement, which when compiled, causes a programmable pixel shader to perform mip map texture lookups even if a pixel of interest does not meet the condition of the conditional statement. As such, any neighboring pixels needed for mip map selection have their associated shader code guaranteed to execute even though the pixel of interest may fail the conditional portion of the conditional statement. The device and method executes texture address calculations for pixels within a region and for pixels outside of a region but only those necessary to determine the mip map level corresponding to a pixel within the region. Execution of shader code for a current pixel is executed if any of the surrounding neighboring pixels meet the desired condition even if the current pixel does not meet the condition.
Abstract:
A method and apparatus for interpolating pixel parameters based on the plurality of vertex values includes operating first and a setup mode and a calculation mode. The method and apparatus includes, while in a setup mode, generating a plurality of differential geometric values based on the plurality of vertex values, wherein the differential geometric values are independent of a parameter slope between the plurality of vertex values. While in a calculation mode, a first geometric value and second geometric value are determined based on a pixel value, a plurality of vertex values and the differential geometric values. A pixel value is determined for each of the plurality of pixels based on the vertex parameter value, the first geometric value and the second geometric value. Thereupon, pixel parameters may be interpolated on a per-pixel basis reusing the differential geometric values.
Abstract:
The present invention includes a multi-thread graphics processing system and method thereof including a reservation station having a plurality of command threads stored therein. The system and method further includes an arbiter operably coupled to the reservation station such that the arbiter retrieves a first command thread of the plurality of command threads stored therein such that the arbiter receives the command thread and thereupon provides the command thread to a command processing engine. The system and method further includes the command processing engine coupled to receive the first command thread from the arbiter such that the command processor may perform at least one processing command from the command thread. Whereupon, a command processing engine provides the first command thread back to the associated reservation station.
Abstract:
A cache memory system which minimizes the latency and latency uncertainty of data memory access by allocating spare cache memories to subsequent conflicting requests, and maintaining the prior requests in a separate table until the prior request is satisfied and the prior allocated cache is free. This reallocation of physical caches to conflicting requests is effected by maintaining an index to the physical cache that is separate and distinct from the logical index associated with the requests that cause the conflict. A conventional indexed cache mechanism is employed to derive the logical index from a subset of the address of the requested data. When the same logical index occurs from data requests from different blocks of memory, the conflict is resolved by assigning a free physical cache to the latter request. The latter assignment is stored in the indexed cache table, and the former assignment is stored in a separate table until it is no longer required.
Abstract:
The example techniques described in this disclosure may be directed to synchronization between producer shaders and consumer shaders. For example, a graphics processing unit (GPU) may execute a producer shader to produce graphics data. After the completion of the production of graphics data, the producer shader may store a value indicative of the amount of produced graphics data. The GPU may execute one or more consumer shaders, after the storage of the value indicative of the amount of produced graphics data, to consume the produced graphics data.
Abstract:
A method and system for higher level filtering uses a native bilinear filter, typically found in a texture mapper, and combines a plurality of bilinear filter results from the bilinear filter to produce a higher level filtered texel value. A native bilinear filter is operative to generate bilinear filtered texel values by performing a plurality of bilinearly filtered texture fetches using bilinear filter fetch coordinates. The method and system combines the plurality of bilinear filtered texel values with a plurality of weights to generate the higher level filtered texel value.
Abstract:
The example techniques described in this disclosure may be directed to synchronization between producer shaders and consumer shaders. For example, a graphics processing unit (GPU) may execute a producer shader to produce graphics data. After the completion of the production of graphics data, the producer shader may store a value indicative of the amount of produced graphics data. The GPU may execute one or more consumer shaders, after the storage of the value indicative of the amount of produced graphics data, to consume the produced graphics data.
Abstract:
A video graphics chip includes a graphics module configured to process incoming video information in accordance with different modes to produce a video output signal and to transmit the video output signal toward a display screen for rendering of video corresponding to the video information, and a display mode module coupled to the graphics module configured to analyze the incoming video information to determine a type of video associated with the incoming video information and to send a video mode indication of a preferred video processing mode for the incoming video information to the graphics module, where the graphics module is configured to process the incoming video information in accordance with a selected mode from the plurality of different modes based on the video mode indication received from the display module.