Dynamic supply control for line driver
    11.
    发明授权
    Dynamic supply control for line driver 有权
    线路驱动器的动态电源控制

    公开(公告)号:US06498521B1

    公开(公告)日:2002-12-24

    申请号:US09998671

    申请日:2001-11-29

    IPC分类号: H03B100

    CPC分类号: H04L25/0266

    摘要: A dynamic supply control circuit is provided for a line driver. The line driver has an amplification factor G, receives an input signal voltage, and drives a transmission line having a load RL via a transformer having a turns ratio of 1:n. The circuit includes an input node for receiving an input signal voltage, a supply node for supplying a driving voltage to the line driver, a lift diode coupled between a fixed supply voltage and the supply node, a lift capacitor coupled between the supply node and an output node, and a lift amplifier having the amplification factor G coupled between the input node and the output node. The lift amplifier drives the lift capacitor when the input signal voltage is greater than an input threshold voltage, the input threshold voltage having a value greater than a common mode voltage of the input signal voltage.

    摘要翻译: 为线路驱动器提供动态电源控制电路。 线路驱动器具有放大系数G,接收输入信号电压,并通过匝数比为1:n的变压器驱动具有负载RL的传输线。 电路包括用于接收输入信号电压的输入节点,用于向线路驱动器提供驱动电压的电源节点,耦合在固定电源电压和电源节点之间的升压二极管,耦合在电源节点和 输出节点和具有耦合在输入节点和输出节点之间的放大因子G的升降放大器。 当输入信号电压大于输入阈值电压时,升降放大器驱动提升电容器,输入阈值电压具有大于输入信号电压的共模电压的值。

    Technique to stabilize the chrominance subcarrier generation in a line-locked digital video system
    13.
    再颁专利
    Technique to stabilize the chrominance subcarrier generation in a line-locked digital video system 有权
    在线性锁定数字视频系统中稳定色度副载波生成的技术

    公开(公告)号:USRE41399E1

    公开(公告)日:2010-06-29

    申请号:US11090671

    申请日:2005-03-25

    申请人: Ara Bicakci

    发明人: Ara Bicakci

    IPC分类号: H04N9/45

    CPC分类号: H04N9/45

    摘要: A technique to stabilize subcarrier generation in a line-locked digital video system, caused by simultaneous locking of the genlock device causing continuous changing of a shared clock signal, by calculating a time shift occurring in an output waveform, converting the time shift into an equivalent phase shift and sending a corresponding phase correction number to a waveform generator block to correct the time shift, and thus stabilize subcarrier generation.

    摘要翻译: 一种通过计算在输出波形中发生的时移而将同步锁相器同时锁定引起共享时钟信号的连续变化引起的用于稳定线锁数字视频系统中的子载波生成的技术,将时移转换为等效 将相应的相位校正数发送到波形发生器块,以校正时移,从而稳定子载波的产生。

    Line driver for asymmetric digital subscriber line system
    14.
    发明授权
    Line driver for asymmetric digital subscriber line system 有权
    用于非对称数字用户线系统的线路驱动器

    公开(公告)号:US06970515B1

    公开(公告)日:2005-11-29

    申请号:US09878142

    申请日:2001-06-08

    IPC分类号: H04B3/00 H04L25/02

    CPC分类号: H04L25/0278 H04L25/0266

    摘要: A line driver couples a data transceiver to a transmission line having a load impedance Z via a transformer with a turns ratio of 1:n, the data transceiver transmitting signals in a first frequency range and receiving signals in a second frequency range different from the first frequency range. The line driver includes an input port for receiving an input signal voltage, an output port for supplying an output signal voltage to the transformer, and a differential amplifier having a low pass filter for amplifying the input signal voltage and outputting an amplified signal voltage. The line driver further includes termination resistors having a resistance Rt, where R t = Z 2 ⁢ n 2 × k ( 0

    摘要翻译: 线路驱动器将数据收发器通过匝数比为1:n的变压器将数据收发器耦合到具有负载阻抗Z的传输线,数据收发器在第一频率范围内发送信号并且接收与第一频率不同的第二频率范围的信号 频率范围。 线路驱动器包括用于接收输入信号电压的输入端口,用于向变压器提供输出信号电压的输出端口以及具有用于放大输入信号电压并输出放大信号电压的低通滤波器的差分放大器。 线路驱动器还包括具有电阻R t的终端电阻器,其中 < MTR> R = / MI> 2 n /> 以及用于耦合输出信号的正反馈路径 从输出端口到差分放大器的适当节点的电压,使得合成输出阻抗基本上与第二频率范围上的负载阻抗Z匹配。

      Technique to stabilize the chrominance subcarrier generation in a line-locked digital video system
      15.
      发明授权
      Technique to stabilize the chrominance subcarrier generation in a line-locked digital video system 有权
      在线性锁定数字视频系统中稳定色度副载波生成的技术

      公开(公告)号:US06741289B1

      公开(公告)日:2004-05-25

      申请号:US09703517

      申请日:2000-10-31

      申请人: Ara Bicakci

      发明人: Ara Bicakci

      IPC分类号: H04N945

      CPC分类号: H04N9/45

      摘要: A technique to stabilize subcarrier generation in a line-locked digital video system, caused by simultaneous locking of the genlock device causing continuous changing of a shared clock signal, by calculating a time shift occurring in an output waveform, converting the time shift into an equivalent phase shift and sending a corresponding phase correction number to a waveform generator block to correct the time shift, and thus stabilize subcarrier generation.

      摘要翻译: 一种通过计算在输出波形中发生的时移而将同步锁相器同时锁定引起共享时钟信号的连续变化引起的用于稳定线锁数字视频系统中的子载波生成的技术,将时移转换为等效 将相应的相位校正数发送到波形发生器块,以校正时移,从而稳定子载波的产生。

      Method and circuit for controlling quiescent current of amplifier
      16.
      发明授权
      Method and circuit for controlling quiescent current of amplifier 有权
      用于控制放大器静态电流的方法和电路

      公开(公告)号:US06603356B1

      公开(公告)日:2003-08-05

      申请号:US10047960

      申请日:2002-01-14

      IPC分类号: H03F326

      CPC分类号: H03F1/308 H03F3/3064

      摘要: A method and circuit control a quiescent current of an amplifier including a preamplifier, error amplifiers, and output devices driven by the error amplifiers, the error amplifiers having an input-referred offset voltage. The method includes (a) applying a calibration voltage to an input of the error amplifiers, (b) calibrating a quiescent current of the output devices by changing the calibration voltage so that the calibrated quiescent current has a predetermined current value, the calibration voltage corresponding to the calibrated quiescent current being set as a correction voltage, and (c) operating the amplifier with the correction voltage applied to the input of the error amplifiers. The circuit includes a correction voltage generator supplying a correction voltage to the error amplifier input, a quiescent current detector detecting the quiescent current, and a calibration circuit adjusting the correction voltage so that the quiescent current is calibrated to a predetermined current value.

      摘要翻译: 一种方法和电路控制包括由误差放大器驱动的前置放大器,误差放大器和输出装置的放大器的静态电流,误差放大器具有输入参考偏移电压。 该方法包括(a)将校准电压施加到误差放大器的输入端,(b)通过改变校准电压来校准输出装置的静态电流,使得校准的静态电流具有预定的电流值,校准电压对应 将校正的静态电流设置为校正电压,以及(c)使用施加到误差放大器的输入的校正电压来操作放大器。 该电路包括校正电压发生器,其向误差放大器输入端提供校正电压,静态电流检测器检测静态电流;校准电路调节校正电压,使得静态电流被校准到预定电流值。

      Low-pass filter design
      17.
      发明授权
      Low-pass filter design 有权
      低通滤波器设计

      公开(公告)号:US08502597B2

      公开(公告)日:2013-08-06

      申请号:US12603448

      申请日:2009-10-21

      IPC分类号: H03K5/00

      CPC分类号: H03H11/1213

      摘要: Techniques for low-pass filtering with high quality factor (Q). In an exemplary embodiment, an input current is coupled to the drain of a first transistor. The drain and the gate of the first transistor are coupled together by a resistor R1, and the drain is coupled to a reference voltage by a first capacitor C1. The gate is coupled to a reference voltage by a second capacitor C2. The gate is further coupled to the gate of a second transistor, and an output current is coupled to the drain of the second transistor. In another exemplary embodiment, further passive elements may be coupled to generate an odd-order low-pass transfer characteristic. Multiple filters may be cascaded in series to synthesize a filter having arbitrary order.

      摘要翻译: 具有高品质因数(Q)的低通滤波技术。 在示例性实施例中,输入电流耦合到第一晶体管的漏极。 第一晶体管的漏极和栅极由电阻器R1耦合在一起,漏极通过第一电容器C1耦合到参考电压。 栅极通过第二电容器C2耦合到参考电压。 栅极还耦合到第二晶体管的栅极,并且输出电流耦合到第二晶体管的漏极。 在另一示例性实施例中,可以连接另外的无源元件以产生奇数低通传输特性。 多个滤波器可以串联级联以合成具有任意顺序的滤波器。

      System to reduce programmable range specifications for a given target accuracy in calibrated electronic circuits
      18.
      发明授权
      System to reduce programmable range specifications for a given target accuracy in calibrated electronic circuits 有权
      系统可减少校准电子电路中给定目标精度的可编程范围规范

      公开(公告)号:US07661051B2

      公开(公告)日:2010-02-09

      申请号:US11696477

      申请日:2007-04-04

      IPC分类号: G01R31/28

      CPC分类号: G01R31/31917 G01R31/3191

      摘要: An apparatus comprising a comparator circuit, a reference circuit, a plurality of elements and a logic circuit. The comparator circuit may be configured to generate a difference signal in response to (i) a reference signal and (ii) a test signal. The reference circuit configured to generate the reference signal in response to a first control signal. The plurality of elements may each be configured to generate an intermediate test signal. One of the intermediate test signals may be presented as the test signal by activating one of the test elements, in response to a second control signal. The logic circuit may be configured to generate (i) the first control signal and (ii) the second control signal, each in response to the difference signal.

      摘要翻译: 一种包括比较器电路,参考电路,多个元件和逻辑电路的装置。 比较器电路可以被配置为响应于(i)参考信号和(ii)测试信号而产生差分信号。 参考电路被配置为响应于第一控制信号而产生参考信号。 多个元件可以各自被配置为产生中间测试信号。 响应于第二控制信号,可以通过激活测试元件之一来呈现中间测试信号之一作为测试信号。 逻辑电路可以被配置为响应于差异信号而产生(i)第一控制信号和(ii)第二控制信号。