公开(公告)号：US20120280957A1

公开(公告)日：2012-11-08

申请号：US13101680

申请日：2011-05-05

Applicant: Cheng-Ho Yu ,  Shih Chang Chang ,  Youngbae Park ,  John Z. Zhong

Inventor： Cheng-Ho Yu ,  Shih Chang Chang ,  Youngbae Park ,  John Z. Zhong

IPC: G09G3/36 ,  G02F1/1368 ,  G06F3/038 ,  G02F1/1339

CPC classification number: G02F1/1339 ,  G02F2001/133357 ,  G02F2001/133388

Abstract: Embodiments of the present disclosure relate to liquid crystal displays (LCDs) and electronic devices incorporating LCDs having an organic passivation layer positioned between edge-sealed two substrates. Specifically, embodiments of the present disclosure employ lithographic techniques (e.g., a half-tone mask, diffractive exposure mask, etc.) to remove or not deposit a portion of the organic passivation layer near the edges of the substrates prior to sealing the substrates along these edges. As described herein, this reduction in the thickness of the organic layer near the edges of the device may improve the strength of the edge seal due to reduced strain in the organic layer.

Abstract translation: 本公开的实施例涉及液晶显示器（LCD）和具有位于边缘密封的两个基板之间的具有有机钝化层的LCD的电子设备。 具体地，本公开的实施例使用光刻技术（例如，半色调掩模，衍射曝光掩模等），以在密封基板之前移除或不沉积基板边缘附近的部分有机钝化层 这些边缘。 如本文所述，在器件边缘附近的有机层的厚度的减小可以由于有机层中的应变减小而提高边缘密封的强度。

公开(公告)号：US20120154699A1

公开(公告)日：2012-06-21

申请号：US12975284

申请日：2010-12-21

Applicant: Cheng Ho Yu ,  Ming Xu ,  Young-Bae Park ,  Zhibing Ge ,  Daisuke Nozu ,  Cheng Chen ,  Abbas Jamshidi Roudbari ,  Shih Chang Chang ,  Shawn R. Gettemy

Inventor： Cheng Ho Yu ,  Ming Xu ,  Young-Bae Park ,  Zhibing Ge ,  Daisuke Nozu ,  Cheng Chen ,  Abbas Jamshidi Roudbari ,  Shih Chang Chang ,  Shawn R. Gettemy

IPC: G02F1/133 ,  G09G5/00

CPC classification number: G09G3/18 ,  G02F1/13338 ,  G02F2001/134318 ,  G09G3/3648 ,  G09G3/3655 ,  G09G2300/043 ,  G09G2310/0224 ,  G09G2310/0283 ,  G09G2320/0209

Abstract: Display ground plane structures may contain slits. Image pixel electrodes in the display may be arranged in rows and columns. Image pixels in the display may be controlled using gate lines that are associated with the rows and data lines that are associated with the columns. An electric field may be produced by each image pixel electrode that extends through a liquid crystal layer to an associated portion of the ground plane. The slits in the ground plane may have a slit width. Data lines may be located sufficiently below the ground plane and sufficiently out of alignment with the slits to minimize crosstalk from parasitic electric fields. A three-column inversion scheme may be used when driving data line signals into the display, so that pairs of pixels that straddle the slits are each driven with a common polarity. Gate line scanning patterns may be used that enhance display uniformity.

Abstract translation: 显示接地平面结构可能包含狭缝。 显示器中的图像像素电极可以以行和列布置。 可以使用与与列相关联的行和数据行相关联的门线来控制显示器中的图像像素。 可以通过延伸穿过液晶层的每个图像像素电极产生电场到接地平面的相关部分。 接地平面中的狭缝可以具有狭缝宽度。 数据线可以充分地位于接地平面的下方，并且与狭缝充分地不对齐，以使来自寄生电场的串扰最小化。 当将数据线信号驱动到显示器中时，可以使用三列反转方案，使得跨越狭缝的像素对各自以共同的极性驱动。 可以使用增强显示均匀性的栅极线扫描图案。

公开(公告)号：US20110267283A1

公开(公告)日：2011-11-03

申请号：US12842542

申请日：2010-07-23

Applicant: Shih Chang CHANG ,  Hopil BAE ,  Cheng Ho YU ,  Zhibing GE

Inventor： Shih Chang CHANG ,  Hopil BAE ,  Cheng Ho YU ,  Zhibing GE

IPC: G06F3/041

CPC classification number: G06F3/0418

Abstract: Scanning gate lines in a gate driver system of a touch screen is provided. The gate driver system can include gate lines connected to display pixel transistors, a display driver that can generate first and second gate clock signals including first and second voltage transitions, respectively, and a gate drivers that can receive the first and second gate clock signals via gate clock lines and that can apply gate line signals, based on the gate clock signals, to the gate lines. A first voltage change generated in a common electrode line of the touch screen by the first voltage transition can be reduced by a second voltage change generated in the common electrode by the second voltage transition.

Abstract translation: 提供了在触摸屏的栅极驱动器系统中扫描栅极线。 栅极驱动器系统可以包括连接到显示像素晶体管的栅极线，可以分别产生包括第一和第二电压转变的第一和第二栅极时钟信号的显示驱动器，以及可以经由第一和第二栅极时钟信号接收第一和第二栅极时钟信号的栅极驱动器 栅极时钟线，并且可以将基于栅极时钟信号的栅极线信号施加到栅极线。 通过第一电压转变在触摸屏的公共电极线中产生的第一电压变化可以通过第二电压转变在公共电极中产生的第二电压变化来减小。

公开(公告)号：US20110248949A1

公开(公告)日：2011-10-13

申请号：US12757896

申请日：2010-04-09

Applicant: Shih Chang Chang ,  Steven Porter Hotelling ,  Cheng Ho Yu

Inventor： Shih Chang Chang ,  Steven Porter Hotelling ,  Cheng Ho Yu

IPC: G06F3/045

CPC classification number: G06F3/044 ,  G06F3/0412 ,  G06F2203/04111

Abstract: Reduction of the effects of differences in parasitic capacitances in touch screens is provided. A touch screen can include multiple display pixels with stackups that each include a first element and a second element. For example, the first element can be a common electrode, and the second element can be a data line. The display pixels can include a first display pixel including a third element connected to the first element, and the third element can contribute to a first parasitic capacitance between the first and second elements of the first display pixel, for example, by overlapping with the second element. The touch screen can also include a second display pixel lacking the third element. The second display pixel can include a second parasitic capacitance between the first and second elements of the second display pixel. The first and second parasitic capacitances can be substantially equal, for example.

Abstract translation: 提供了减少触摸屏中寄生电容差异的影响。 触摸屏可以包括具有堆叠的多个显示像素，每个显示像素包括第一元素和第二元素。 例如，第一元件可以是公共电极，第二元件可以是数据线。 显示像素可以包括包括连接到第一元件的第三元件的第一显示像素，并且第三元件可以有助于第一显示像素的第一和第二元素之间的第一寄生电容，例如通过与第二元件重叠 元件。 触摸屏还可以包括缺少第三元素的第二显示像素。 第二显示像素可以包括第二显示像素的第一和第二元素之间的第二寄生电容。 例如，第一和第二寄生电容可以基本上相等。

公开(公告)号：US20090073015A1

公开(公告)日：2009-03-19

申请号：US12229360

申请日：2008-08-21

Applicant: Cheng-Ho Yu

Inventor： Cheng-Ho Yu

IPC: H03M1/66

CPC classification number: H03M1/1014 ,  H03M1/78

Abstract: A system for displaying images is provided. A capacitor type digital-to-analog converter is coupled between a first node and a second node and generates a first analog signal according to a digital signal with N bit data. An analogue buffer is coupled between the second node and a third node and generates a second analog signal according to the first analog signal and a bias voltage. A first switch is coupled between a predetermined voltage and the second node. A second switch is coupled between the first node and the third node. A third switch is coupled between the third node and an analog output signal. The second switch is turned on and the third switch is turned off when the first switch is turned on, and the first and second switches are turned off when the third switch is turned on.

Abstract translation: 提供了一种用于显示图像的系统。 电容器型数模转换器耦合在第一节点和第二节点之间，并根据具有N位数据的数字信号产生第一模拟信号。 模拟缓冲器耦合在第二节点和第三节点之间，并且根据第一模拟信号和偏置电压产生第二模拟信号。 第一开关耦合在预定电压和第二节点之间。 第二开关耦合在第一节点和第三节点之间。 第三开关耦合在第三节点和模拟输出信号之间。 当第一开关接通时，第二开关被接通并且第三开关被断开，并且当第三开关接通时第一和第二开关被断开。

公开(公告)号：US09319036B2

公开(公告)日：2016-04-19

申请号：US13112862

申请日：2011-05-20

Applicant: Shih Chang Chang ,  Ting-Kuo Chang ,  Abbas Jamshidi Roudbari ,  Cheng-Ho Yu

Inventor： Shih Chang Chang ,  Ting-Kuo Chang ,  Abbas Jamshidi Roudbari ,  Cheng-Ho Yu

IPC: G06F3/038 ,  H03K5/12 ,  G09G3/32 ,  G09G3/36

CPC classification number: H03K5/12 ,  G09G3/3266 ,  G09G3/3677 ,  G09G2330/06

Abstract: A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.

Abstract translation: 公开了一种用于显示器的门信号调节电路。 门信号调整电路可以调整用于驱动数据显示的门信号的转换时间。 调整可以根据显示器的要求加快或减慢转换时间。 在一个示例中，门信号调整电路可以包括多个晶体管，其中第一组晶体管输出栅极信号，第二组晶体管输出对栅极信号的调整。 第二组晶体管可以是相同或不同的尺寸，这取决于所需数量的调节选项。 电路还可以包括耦合到第二组晶体管的控制线以控制调节输出。 门信号调整可以减少显示屏中的串扰。

公开(公告)号：US20130271684A1

公开(公告)日：2013-10-17

申请号：US13477953

申请日：2012-05-22

Applicant: Ting-Kuo Chang ,  Shih-Chang Chang ,  Abbas Jamshidi Roudbari ,  Cheng-Ho Yu

Inventor： Ting-Kuo Chang ,  Shih-Chang Chang ,  Abbas Jamshidi Roudbari ,  Cheng-Ho Yu

IPC: G02F1/1345 ,  C30B33/08 ,  G02F1/1368

CPC classification number: G02F1/13458 ,  G02F2001/13629

Abstract: Disclosed embodiments relate to signal routings for use in a display device. The display device may include a liquid crystal display (LCD) panel having multiple pixels arranged in rows and columns. Each of the pixels includes a pixel electrode and a thin-film transistor (TFT). The LCD may include a conductive signal routing portion having a first metallic layer, a second metallic layer formed directly on the first metallic layer, and a third metallic layer formed directly on the second metallic layer. The first metallic layer may include a contact terminal. The second metallic layer when combined with the third metallic layers may decrease the resistance of the third metallic layer.

Abstract translation: 公开的实施例涉及用于显示设备中的信号路由。 显示装置可以包括具有以行和列排列的多个像素的液晶显示器（LCD）面板。 每个像素包括像素电极和薄膜晶体管（TFT）。 LCD可以包括具有第一金属层，直接形成在第一金属层上的第二金属层和直接形成在第二金属层上的第三金属层的导电信号路由部分。 第一金属层可以包括接触端子。 当与第三金属层组合时，第二金属层可以降低第三金属层的电阻。

公开(公告)号：US08994906B2

公开(公告)日：2015-03-31

申请号：US13584549

申请日：2012-08-13

Applicant: Shih-Chang Chang ,  Cheng-Ho Yu ,  Abbas Jamshidi Roudbari ,  Ting-Kuo Chang

Inventor： Shih-Chang Chang ,  Cheng-Ho Yu ,  Abbas Jamshidi Roudbari ,  Ting-Kuo Chang

IPC: G02F1/1345 ,  G02F1/1362

CPC classification number: G02F1/13454 ,  G02F1/133528 ,  G02F1/136286 ,  G02F1/1368

Abstract: A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.

Abstract translation: 显示器可以具有带有衬底层的薄膜晶体管层。 电介质层可以形成在衬底层上，并且可以具有上表面和下表面。 薄膜晶体管层可以包括显示像素阵列。 数据线和栅极线可以向显示像素提供信号。 显示器的非活动外围部分中的栅极驱动器电路可以包括用于每个栅极线的栅极驱动器电路。 栅极驱动器电路可以包括形成在电介质层的上表面上的薄膜晶体管。 耦合在栅极驱动电路和公共电极线之间的诸如栅极低线，栅极布线线的信号线可以由两个或更多个金属层形成以减小它们的宽度，或者可以嵌入在上部的电介质层之间 和薄膜晶体管下的下表面。

公开(公告)号：US20120162121A1

公开(公告)日：2012-06-28

申请号：US12976909

申请日：2010-12-22

Applicant: Shih Chang Chang ,  Hopil Bae ,  Cheng Ho Yu ,  Ahmad Al-Dahle ,  Abbas Jamshidi Roudbari

Inventor： Shih Chang Chang ,  Hopil Bae ,  Cheng Ho Yu ,  Ahmad Al-Dahle ,  Abbas Jamshidi Roudbari

IPC: G06F3/045

CPC classification number: G06F3/044 ,  G06F3/0412 ,  G06F3/0416 ,  G06F3/045

Abstract: Setting a slew rate, e.g., a rising time or a falling time, of a scanning signal can be performed with a first operation, and a shunting resistance of the scanning line can be set with a second operation. A scanning system that scans a display screen, a touch screen, etc., can set a desired slew rate during a first period of time and can set a desired shunting resistance during a second period of time. A gate line system can sequentially scan gate lines to display an image during a display phase of a touch screen. The gate line system can, for example, increase the falling times of gate line signals. After the falling gate line signal has stabilized, for example, the gate line system can decrease the shunting resistance of the gate line.

Abstract translation: 可以通过第一操作来执行扫描信号的转换速率，例如上升时间或下降时间，并且可以通过第二操作来设置扫描线的分流电阻。 扫描显示屏，触摸屏等的扫描系统可以在第一时间段期间设置期望的转换速率，并且可以在第二时间段期间设置期望的分流电阻。 栅极线系统可以在触摸屏的显示阶段中顺序地扫描栅极线以显示图像。 栅极线系统可以例如增加栅极线信号的下降时间。 在下降的栅极线信号稳定之后，例如，栅极线系统可以降低栅极线的分流电阻。

公开(公告)号：US07683816B2

公开(公告)日：2010-03-23

申请号：US12229360

申请日：2008-08-21

Applicant: Cheng-Ho Yu

Inventor： Cheng-Ho Yu

IPC: H03M1/66

CPC classification number: H03M1/1014 ,  H03M1/78

Abstract: A system for displaying images is provided. A capacitor type digital-to-analog converter is coupled between a first node and a second node and generates a first analog signal according to a digital signal with N bit data. An analogue buffer is coupled between the second node and a third node and generates a second analog signal according to the first analog signal and a bias voltage. A first switch is coupled between a predetermined voltage and the second node. A second switch is coupled between the first node and the third node. A third switch is coupled between the third node and an analog output signal. The second switch is turned on and the third switch is turned off when the first switch is turned on, and the first and second switches are turned off when the third switch is turned on.

Abstract translation: 提供了一种用于显示图像的系统。 电容器型数模转换器耦合在第一节点和第二节点之间，并根据具有N位数据的数字信号产生第一模拟信号。 模拟缓冲器耦合在第二节点和第三节点之间，并且根据第一模拟信号和偏置电压产生第二模拟信号。 第一开关耦合在预定电压和第二节点之间。 第二开关耦合在第一节点和第三节点之间。 第三开关耦合在第三节点和模拟输出信号之间。 当第一开关接通时，第二开关被接通并且第三开关被断开，并且当第三开关接通时第一和第二开关被断开。