Gate signal adjustment circuit
    1.
    发明授权
    Gate signal adjustment circuit 有权
    门信号调节电路

    公开(公告)号:US09319036B2

    公开(公告)日:2016-04-19

    申请号:US13112862

    申请日:2011-05-20

    CPC classification number: H03K5/12 G09G3/3266 G09G3/3677 G09G2330/06

    Abstract: A gate signal adjustment circuit for a display is disclosed. The gate signal adjustment circuit can adjust a transition time of a gate signal used to drive data displaying. The adjustment can be to either speed up or slow down the transition time according to the requirements of the display. In an example, the gate signal adjustment circuit can include multiple transistors, where a first set of the transistors outputs the gate signal and a second set of the transistors outputs an adjustment to the gate signal. The second set of transistors can be the same or different sizes depending on the desirable number of adjustment options. The circuit can also include a control line coupled to the second set of transistors to control the adjustment output. Gate signal adjustment can reduce crosstalk in the display.

    Abstract translation: 公开了一种用于显示器的门信号调节电路。 门信号调整电路可以调整用于驱动数据显示的门信号的转换时间。 调整可以根据显示器的要求加快或减慢转换时间。 在一个示例中,门信号调整电路可以包括多个晶体管,其中第一组晶体管输出栅极信号,第二组晶体管输出对栅极信号的调整。 第二组晶体管可以是相同或不同的尺寸,这取决于所需数量的调节选项。 电路还可以包括耦合到第二组晶体管的控制线以控制调节输出。 门信号调整可以减少显示屏中的串扰。

    DEVICES AND METHODS FOR REDUCING THE SIZE OF DISPLAY PANEL ROUTINGS
    2.
    发明申请
    DEVICES AND METHODS FOR REDUCING THE SIZE OF DISPLAY PANEL ROUTINGS 有权
    用于减小显示面板路由尺寸的装置和方法

    公开(公告)号:US20130271684A1

    公开(公告)日:2013-10-17

    申请号:US13477953

    申请日:2012-05-22

    CPC classification number: G02F1/13458 G02F2001/13629

    Abstract: Disclosed embodiments relate to signal routings for use in a display device. The display device may include a liquid crystal display (LCD) panel having multiple pixels arranged in rows and columns. Each of the pixels includes a pixel electrode and a thin-film transistor (TFT). The LCD may include a conductive signal routing portion having a first metallic layer, a second metallic layer formed directly on the first metallic layer, and a third metallic layer formed directly on the second metallic layer. The first metallic layer may include a contact terminal. The second metallic layer when combined with the third metallic layers may decrease the resistance of the third metallic layer.

    Abstract translation: 公开的实施例涉及用于显示设备中的信号路由。 显示装置可以包括具有以行和列排列的多个像素的液晶显示器(LCD)面板。 每个像素包括像素电极和薄膜晶体管(TFT)。 LCD可以包括具有第一金属层,直接形成在第一金属层上的第二金属层和直接形成在第二金属层上的第三金属层的导电信号路由部分。 第一金属层可以包括接触端子。 当与第三金属层组合时,第二金属层可以降低第三金属层的电阻。

    Display with multilayer and embedded signal lines
    3.
    发明授权
    Display with multilayer and embedded signal lines 有权
    显示多层和嵌入式信号线

    公开(公告)号:US08994906B2

    公开(公告)日:2015-03-31

    申请号:US13584549

    申请日:2012-08-13

    CPC classification number: G02F1/13454 G02F1/133528 G02F1/136286 G02F1/1368

    Abstract: A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.

    Abstract translation: 显示器可以具有带有衬底层的薄膜晶体管层。 电介质层可以形成在衬底层上,并且可以具有上表面和下表面。 薄膜晶体管层可以包括显示像素阵列。 数据线和栅极线可以向显示像素提供信号。 显示器的非活动外围部分中的栅极驱动器电路可以包括用于每个栅极线的栅极驱动器电路。 栅极驱动器电路可以包括形成在电介质层的上表面上的薄膜晶体管。 耦合在栅极驱动电路和公共电极线之间的诸如栅极低线,栅极布线线的信号线可以由两个或更多个金属层形成以减小它们的宽度,或者可以嵌入在上部的电介质层之间 和薄膜晶体管下的下表面。

    System for displaying images
    4.
    发明授权
    System for displaying images 有权
    用于显示图像的系统

    公开(公告)号:US07683816B2

    公开(公告)日:2010-03-23

    申请号:US12229360

    申请日:2008-08-21

    Applicant: Cheng-Ho Yu

    Inventor: Cheng-Ho Yu

    CPC classification number: H03M1/1014 H03M1/78

    Abstract: A system for displaying images is provided. A capacitor type digital-to-analog converter is coupled between a first node and a second node and generates a first analog signal according to a digital signal with N bit data. An analogue buffer is coupled between the second node and a third node and generates a second analog signal according to the first analog signal and a bias voltage. A first switch is coupled between a predetermined voltage and the second node. A second switch is coupled between the first node and the third node. A third switch is coupled between the third node and an analog output signal. The second switch is turned on and the third switch is turned off when the first switch is turned on, and the first and second switches are turned off when the third switch is turned on.

    Abstract translation: 提供了一种用于显示图像的系统。 电容器型数模转换器耦合在第一节点和第二节点之间,并根据具有N位数据的数字信号产生第一模拟信号。 模拟缓冲器耦合在第二节点和第三节点之间,并且根据第一模拟信号和偏置电压产生第二模拟信号。 第一开关耦合在预定电压和第二节点之间。 第二开关耦合在第一节点和第三节点之间。 第三开关耦合在第三节点和模拟输出信号之间。 当第一开关接通时,第二开关被接通并且第三开关被断开,并且当第三开关接通时第一和第二开关被断开。

    Measuring system and method
    5.
    发明授权
    Measuring system and method 有权
    测量系统和方法

    公开(公告)号:US07671619B2

    公开(公告)日:2010-03-02

    申请号:US12211264

    申请日:2008-09-16

    CPC classification number: G01R31/002

    Abstract: A measuring system comprises a pulse generator, an under test device, a variable resistor and a detecting control system. The pulse generator provides pulse signals with different voltage peaks to the under test device and the variable resistor. The variable resistor adjusts its resistance value according to a control signal. The detecting control system detects the voltage ringing ranges of the first terminal of the under test device at different resistance values. The detecting control system generates the control signal to adjust the resistance value of the variable resistor according to the voltage ringing ranges.

    Abstract translation: 测量系统包括脉冲发生器,被测装置,可变电阻器和检测控制系统。 脉冲发生器向下测试装置和可变电阻器提供具有不同电压峰值的脉冲信号。 可变电阻根据控制信号调整其电阻值。 检测控制系统以不同的电阻值检测被测装置的第一端子的电压振铃范围。 检测控制系统产生控制信号,根据电压振铃范围调整可变电阻的电阻值。

    Two Doping Regions in Lightly Doped Drain for Thin Film Transistors and Associated Doping Processes
    7.
    发明申请
    Two Doping Regions in Lightly Doped Drain for Thin Film Transistors and Associated Doping Processes 有权
    用于薄膜晶体管和相关掺杂过程的轻掺杂漏极中的两个掺杂区域

    公开(公告)号:US20140061656A1

    公开(公告)日:2014-03-06

    申请号:US13601535

    申请日:2012-08-31

    Abstract: A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area, and doping the second portion of the doped semiconductor layer with a third doping dose.

    Abstract translation: 提供了一种制造用于具有像素阵列的LCD的薄膜晶体管(TFT)的方法。 该方法包括在包括导电栅极层的TFT堆叠的一部分上沉积第一光致抗蚀剂层和半导体层。 该方法还包括以第一掺杂剂量掺杂暴露的半导体层。 该方法还包括蚀刻导电栅极层的一部分以暴露半导体层的一部分,并以第二掺杂剂量掺杂半导体层的暴露部分。 该方法还包括在像素的有源区域中在掺杂半导体层的第一部分上沉积第二光致抗蚀剂层,以在有源区域周围的区域中暴露掺杂半导体层的第二部分,以及掺杂半导体层的第二部分 掺杂半导体层具有第三掺杂剂量。

    INTERFERENCE REDUCTION SYSTEMS AND METHODS
    8.
    发明申请
    INTERFERENCE REDUCTION SYSTEMS AND METHODS 有权
    干扰减少系统和方法

    公开(公告)号:US20130052971A1

    公开(公告)日:2013-02-28

    申请号:US13217902

    申请日:2011-08-25

    CPC classification number: H04B15/04

    Abstract: The antenna on hand held devices, such as the iPhone or iPad, can be subject to interference from other circuitry on the device. Such interference may come from high frequency switching of nearby display circuitry, such as de-multiplexors or other circuits. To address this issue, the switching rates may be slowed in certain circuits by adding resistance and/or capacitance, thus raising the RC time constant and slowing the switching times to reduce the high frequency components. Alternatively or in addition to, an EMI shield can be placed over some or all of the display driving circuitry to shield the antenna from high frequency interference.

    Abstract translation: 手持式设备(如iPhone或iPad)的天线可能受到设备上其他电路的干扰。 这种干扰可能来自附近的显示电路(例如解复用器或其他电路)的高频切换。 为了解决这个问题,通过增加电阻和/或电容,某些电路中的开关速率可能会降低,从而提高RC时间常数并减慢开关时间,以减少高频分量。 或者或除此之外,可以将EMI屏蔽物放置在部分或全部显示驱动电路上,以将天线屏蔽在高频干扰之下。

    Measuring System and Method
    9.
    发明申请
    Measuring System and Method 有权
    测量系统和方法

    公开(公告)号:US20090074154A1

    公开(公告)日:2009-03-19

    申请号:US12211264

    申请日:2008-09-16

    CPC classification number: G01R31/002

    Abstract: A measuring system comprises a pulse generator, an under test device, a variable resistor and a detecting control system. The pulse generator provides pulse signals with different voltage peaks to the under test device and the variable resistor. The variable resistor adjusts its resistance value according to a control signal. The detecting control system detects the voltage ringing ranges of the first terminal of the under test device at different resistance values. The detecting control system generates the control signal to adjust the resistance value of the variable resistor according to the voltage ringing ranges.

    Abstract translation: 测量系统包括脉冲发生器,被测装置,可变电阻器和检测控制系统。 脉冲发生器向下测试装置和可变电阻器提供具有不同电压峰值的脉冲信号。 可变电阻根据控制信号调整其电阻值。 检测控制系统以不同的电阻值检测被测装置的第一端子的电压振铃范围。 检测控制系统产生控制信号,根据电压振铃范围调整可变电阻的电阻值。

    Two doping regions in lightly doped drain for thin film transistors and associated doping processes
    10.
    发明授权
    Two doping regions in lightly doped drain for thin film transistors and associated doping processes 有权
    用于薄膜晶体管和相关掺杂工艺的轻掺杂漏极中的两个掺杂区域

    公开(公告)号:US08987027B2

    公开(公告)日:2015-03-24

    申请号:US13601535

    申请日:2012-08-31

    Abstract: A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that includes a conductive gate layer, and a semiconductor layer. The method also includes doping the exposed semiconductor layer with a first doping dose. The method further includes etching a portion of the conductive gate layer to expose a portion of the semiconductor layer, and doping the exposed portion of the semiconductor layer with a second doping dose. The method also includes depositing a second photoresist layer over a first portion of the doped semiconductor layer in an active area of the pixels to expose a second portion of the doped semiconductor layer in an area surrounding the active area, and doping the second portion of the doped semiconductor layer with a third doping dose.

    Abstract translation: 提供了一种制造用于具有像素阵列的LCD的薄膜晶体管(TFT)的方法。 该方法包括在包括导电栅极层的TFT堆叠的一部分上沉积第一光致抗蚀剂层和半导体层。 该方法还包括以第一掺杂剂量掺杂暴露的半导体层。 该方法还包括蚀刻导电栅极层的一部分以暴露半导体层的一部分,并以第二掺杂剂量掺杂半导体层的暴露部分。 该方法还包括在像素的有源区域中在掺杂半导体层的第一部分上沉积第二光致抗蚀剂层,以在有源区域周围的区域中暴露掺杂半导体层的第二部分,以及掺杂半导体层的第二部分 掺杂半导体层具有第三掺杂剂量。

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