公开(公告)号：US07944265B2

公开(公告)日：2011-05-17

申请号：US12046527

申请日：2008-03-12

Applicant: Christopher Tin Sing Lam ,  Fu Cheng Wang ,  Shou Fang Chen

Inventor： Christopher Tin Sing Lam ,  Fu Cheng Wang ,  Shou Fang Chen

IPC: G06F1/04 ,  H03K3/00

CPC classification number: H03L7/22 ,  H03L7/16

Abstract: A clock generator includes a delta sigma modulator, a counter and a first phase lock loop. The delta sigma modulator sequentially generates a plurality of variable parameters according to a predetermined value and a first input clock signal. The counter, which is connected to the delta sigma modulator, is used to generate an output clock signal in accordance with a counting value and a second input clock signal. The counting value is relevant to the variable parameters. The first phase lock loop, which is connected to the output of the counter, is used to generate an objective clock signal in accordance with the output clock signal.

Abstract translation: 时钟发生器包括ΔΣ调制器，计数器和第一锁相环。 ΔΣ调制器根据预定值和第一输入时钟信号顺序产生多个可变参数。 连接到Δ-Σ调制器的计数器用于根据计数值和第二输入时钟信号产生输出时钟信号。 计数值与变量参数相关。 连接到计数器的输出的第一锁相环用于根据输出时钟信号产生目标时钟信号。

公开(公告)号：US07700980B1

公开(公告)日：2010-04-20

申请号：US11975278

申请日：2007-10-17

Applicant: Constantin Bulucea ,  Fu-Cheng Wang ,  Prasad Chaparala

Inventor： Constantin Bulucea ,  Fu-Cheng Wang ,  Prasad Chaparala

IPC: H01L31/112

CPC classification number: H01L29/1083 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/105

Abstract: Each of a pair of like-polarity IGFETs (40 or 42 and 240 or 242) has a channel zone (64 or 84) situated in body material (50). Short-channel effects are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 μm deep into the body material but not more than 0.4 μm deep into the body material. A pocket portion (100/102 or 104) extends along both source drain zones of one of the IGFETs. A pocket portion (244 or 246) extends largely along only one of the source/drain zones of the other IGFET so that it is an asymmetrical device.

Abstract translation: 一对相同极性的IGFET（40或42和240或242）中的每一个具有位于主体材料（50）中的通道区（64或84）。 通过设置沟道区域中的净掺杂剂浓度以在IGFET的源极/漏极区域（60和62或80和82）之间的位置处纵向达到局部表面最小值并且通过布置净掺杂剂来缓解短沟道效应 在身体材料中的浓度达到局部地下最大超过0.1μm深的身体材料，但不超过0.4μm深入身体材料。 袋部分（100/102或104）沿着IGFET之一的两个源极漏极区延伸。 袋部分（244或246）沿着另一个IGFET的源极/漏极区域中的一个较大地延伸，使得它是不对称的装置。

公开(公告)号：US06461932B1

公开(公告)日：2002-10-08

申请号：US09211703

申请日：1998-12-14

Applicant: Fu-Cheng Wang

Inventor： Fu-Cheng Wang

IPC: H01L21336

CPC classification number: H01L21/76229 ,  H01L21/31053

Abstract: A trenched-isolated semiconductor structure is created by a process that entails forming a patterned trench (54) along an upper surface of a semiconductor body (40). A dielectric layer (56) is provided over the upper semiconductor surface. The dielectric layer is covered with a smoothening layer (60) whose upper surface is smoother than the upper surface of the dielectric layer. The smoothening layer is removed starting from its upper surface. During the removal of the smoothening layer, upward-protruding material of the dielectric layer progressively becomes exposed and is also removed. As a result, the remainder of dielectric layer has a smoother upper surface than the initial upper surface of the dielectric layer.

Abstract translation: 沟槽隔离半导体结构通过沿着半导体本体（40）的上表面形成图案化沟槽（54）的工艺产生。 介电层（56）设置在上半导体表面上。 电介质层被上表面比电介质层的上表面更平滑的平滑层（60）覆盖。 平滑层从其上表面开始去除。 在去除平滑层期间，电介质层的向上突出的材料逐渐变得暴露并且也被去除。 结果，电介质层的其余部分具有比介电层的初始上表面更平滑的上表面。

公开(公告)号：US08411344B2

公开(公告)日：2013-04-02

申请号：US12805545

申请日：2010-08-05

Applicant: Tsung-Hui Tsai ,  Fu-cheng Wang ,  Chih-Ming Ho ,  Chi-Te Liang

Inventor： Tsung-Hui Tsai ,  Fu-cheng Wang ,  Chih-Ming Ho ,  Chi-Te Liang

IPC: G02B26/02

CPC classification number: G02B26/004

Abstract: The present invention discloses an electrical control light valve apparatus having liquid gallium. The invention comprises the transparent glass as a substrate, ITO transparent conductive film as the electrodes, the liquid gallium as the valve located on the ITO transparent conductive film, and the partial-transparent glass is located on the top of the electrical control light valve apparatus.

Abstract translation: 本发明公开了一种具有液态镓的电控光阀装置。 本发明包括作为基板的透明玻璃，作为电极的ITO透明导电膜，作为阀的液态镓位于ITO透明导电膜上，部分透明玻璃位于电动控制光阀装置的顶部 。

公开(公告)号：US20120181614A1

公开(公告)日：2012-07-19

申请号：US13309473

申请日：2011-12-01

Applicant: Chih Sieh Teng ,  Constantin Bulucea ,  Chin-Miin Shyu ,  Fu-Cheng Wang ,  Prasad Chaparala

Inventor： Chih Sieh Teng ,  Constantin Bulucea ,  Chin-Miin Shyu ,  Fu-Cheng Wang ,  Prasad Chaparala

IPC: H01L27/088

CPC classification number: H01L29/1083 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/105

Abstract: An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 μm deep into the body material but not more than 0.1 μm deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.

Abstract translation: IGFET（40或42）具有位于主体材料（50）中的通道区（64或84）。 通过设置通道区域中的净掺杂剂浓度以在IGFET的源极/漏极区域（60和62或80和82）之间的位置处纵向达到局部表面最小值来减轻短通道阈值电压滚降和穿透，以及 通过排列主体材料中的净掺杂剂浓度达到主体材料深度超过0.1μm的局部表面最大深度，但不超过体积材料的0.1μm深。 p沟道IGFET（120或122）的源极/漏极区（140和142或160和162）具有渐变结特征以减小结电容，从而提高开关速度。

公开(公告)号：US08120531B2

公开(公告)日：2012-02-21

申请号：US12719294

申请日：2010-03-08

Applicant: Chao-Tung Yang ,  Fu-Cheng Wang ,  Shoufang Chen ,  Shuo-Yuan Hsiao

Inventor： Chao-Tung Yang ,  Fu-Cheng Wang ,  Shoufang Chen ,  Shuo-Yuan Hsiao

IPC: G01S19/36

CPC classification number: G01S19/36 ,  G01S19/33

Abstract: A signal processing apparatus for a multi-mode satellite positioning system includes a band-pass filter, a local oscillator circuit, a first mixing circuit, a second mixing circuit, an analog-to-digital converter and a baseband circuit. By properly allocating a local frequency, radio frequency (RF) signals of a Global Positioning System (GPS), a Galileo positioning system and a Global Navigation System (GLONASS) are processed via a single signal path to save hardware cost.

Abstract translation: 一种用于多模式卫星定位系统的信号处理装置，包括带通滤波器，本地振荡器电路，第一混频电路，第二混频电路，模数转换器和基带电路。 通过适当地分配本地频率，通过单个信号路径处理全球定位系统（GPS），伽利略定位系统和全球导航系统（GLONASS）的射频（RF）信号以节省硬件成本。

公开(公告)号：US20110193485A1

公开(公告)日：2011-08-11

申请号：US12805658

申请日：2010-08-12

Applicant: Bin-Juine Huang ,  Chun-Wen Tang ,  Fu-Cheng Wang

Inventor： Bin-Juine Huang ,  Chun-Wen Tang ,  Fu-Cheng Wang

IPC: H05B37/02 ,  H05B41/24

CPC classification number: H05B33/086 ,  H05B33/0866 ,  H05B33/0872

Abstract: The invention discloses a novel control system for a Poly-Chromatic light-emitting diode (LED) lighting system, and applies feed forward and feedback control techniques to regulate the color and luminous outputs. Also, the control system is proposed for achieving luminous and color consistency for Poly-Chromatic LED lighting.

Abstract translation: 本发明公开了一种用于多色发光二极管（LED）照明系统的新型控制系统，并且使用前馈和反馈控制技术来调节颜色和发光输出。 此外，为了实现多色LED照明的发光和颜色一致性，提出了控制系统。

公开(公告)号：US20100148463A1

公开(公告)日：2010-06-17

申请号：US12379899

申请日：2009-03-04

Applicant: Fu-cheng Wang ,  Hsiang-an Chan

Inventor： Fu-cheng Wang ,  Hsiang-an Chan

IPC: B60G17/00 ,  F16H1/24 ,  F16F15/03

CPC classification number: F16F15/03 ,  B60G13/14 ,  B60G17/015 ,  B60G2202/16 ,  B60G2202/25 ,  B60G2202/42 ,  B60G2204/419 ,  F16F2232/06 ,  Y10T74/19749

Abstract: The invention provides a mechatronic suspension system and a method for shock absorbing thereof. The invention applies the analogies between mechanical and electronic networks to propose a mechatronic suspension system, which combines a ball-screw inerter and a permanent magnet electric machinery, such that the complicated network structure can be realized through the combination of mechanical and electronic networks. The mechatronic suspension system is connected to two terminals, and consists of the inerter mechanism, the permanent magnet electric machinery and the feedback circuit. The inerter mechanism is connected to the terminals to transfer the linear motion into the rotational motion. The permanent magnet electric machinery is connected to the inerter mechanism to generate a corresponding voltage. And the feedback circuit is connected to the permanent magnet electric machinery to provide suitable system impedance and to generate a feedback force.

Abstract translation: 本发明提供一种机电一体化悬浮系统及其吸震方法。 本发明应用机械和电子网络之间的类比来提出一种组合滚珠丝杠惰化器和永磁电机的机电一体化悬挂系统，从而可以通过机械和电子网络的组合来实现复杂的网络结构。 机电一体式悬挂系统连接到两个端子，由重载机构，永磁电机和反馈电路组成。 重载机构连接到端子以将线性运动转移到旋转运动中。 永磁电机连接到惰化机构以产生相应的电压。 并且反馈电路连接到永磁电机，以提供适当的系统阻抗并产生反馈力。

公开(公告)号：US07595244B1

公开(公告)日：2009-09-29

申请号：US11975042

申请日：2007-10-16

Applicant: Constantin Bulucea ,  Fu-Cheng Wang ,  Prasad Chaparala

Inventor： Constantin Bulucea ,  Fu-Cheng Wang ,  Prasad Chaparala

IPC: H01L21/336

CPC classification number: H01L29/1083 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/105

Abstract: Fabrication of two differently configured like-polarity insulated-gate field-effect transistors (40 or 42 and 240 or 242) entails introducing multiple body-material semiconductor dopants of the same conductivity type into a semiconductor body. Gate electrodes (74 or 94) are defined such that each body-material dopant reaches a maximum concentration below the channel surface depletion regions, below all gate-electrode material overlying the channel zones (64 or 84), and at a different depth than each other body-material dopant. The transistors are provided with source/drain zones (60 or 80) of opposite conductivity type to, and with halo pocket portions of the same conductivity type as, the body-material dopants. One pocket portion (100/102 or 104) extends along both source/drain zones of one of the transistors. Another pocket portion (244 or 246) extends largely along only one of the source/drain zones of the other transistor so that it is asymmetrical.

Abstract translation: 两个不同构造的同极性绝缘栅场效应晶体管（40或42和240或242）的制造需要将相同导电类型的多个体材料半导体掺杂剂引入半导体本体。 限定栅电极（74或94），使得每个主体材料掺杂剂在沟道表面耗尽区下方达到最大浓度，低于覆盖沟道区（64或84）的所有栅电极材料，并且在不同于每个 其他体材料掺杂剂。 晶体管具有与体材料掺杂剂相同的导电类型的源极/漏极区（60或80）以及具有相同导电类型的卤素口袋部分。 一个口袋部分（100/102或104）沿着一个晶体管的源极/漏极区域延伸。 另一个口袋部分（244或246）沿着另一个晶体管的源极/漏极区域中的一个较大地延伸，使得它是不对称的。

公开(公告)号：US06797576B1

公开(公告)日：2004-09-28

申请号：US10327352

申请日：2002-12-20

Applicant: Chih Sieh Teng ,  Constantin Bulucea ,  Chin-Miin Shyu ,  Fu-Cheng Wang ,  Prasad Chaparala

Inventor： Chih Sieh Teng ,  Constantin Bulucea ,  Chin-Miin Shyu ,  Fu-Cheng Wang ,  Prasad Chaparala

IPC: H01L21336

CPC classification number: H01L29/66492 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823892 ,  H01L29/1045 ,  H01L29/105 ,  H01L29/665

Abstract: An IGFET (40 or 42) has a channel zone (64 or 84) situated in body material (50). Short-channel threshold voltage roll-off and punchthrough are alleviated by arranging for the net dopant concentration in the channel zone to longitudinally reach a local surface minimum at a location between the IGFET's source/drain zones (60 and 62 or 80 and 82) and by arranging for the net dopant concentration in the body material to reach a local subsurface maximum more than 0.1 &mgr;m deep into the body material but not more than 0.1 &mgr;m deep into the body material. The source/drain zones (140 and 142 or 160 and 162) of a p-channel IGFET (120 or 122) are provided with graded-junction characteristics to reduce junction capacitance, thereby increasing switching speed.

Abstract translation: IGFET（40或42）具有位于主体材料（50）中的通道区（64或84）。 通过设置通道区域中的净掺杂剂浓度以在IGFET的源极/漏极区域（60和62或80和82）之间的位置处纵向达到局部表面最小值来减轻短通道阈值电压滚降和穿透，以及 通过布置主体材料中的净掺杂剂浓度达到主体材料深度超过0.1μm的局部地下最大深度，但不超过0.1μm深的主体材料。 p沟道IGFET（120或122）的源极/漏极区（140和142或160和162）具有渐变结特征以减小结电容，从而提高开关速度。