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11.发明授权公开(公告)号：US11094035B2
公开(公告)日：2021-08-17
申请号：US16825541
申请日：2020-03-20
Applicant: GRASS VALLEY CANADA
Inventor： Giuseppe Giovannelli
Abstract: A system and method that splices an initial 3D LUT for imaging format conversion into a plurality of smaller LUTs that can be stored in separate RAMs. During operation, the upper 5-bits serve as index values of each component of an incoming GBR pixel and are used to determine which of the smaller RAMs contain the correct index values for the pixel data. Specifically, a first index value can be derived from the incoming GBR pixel data and used to lookup all sub-cube vertices corresponding to the incoming pixel and the corresponding RAMs. After determining the correct RAMs, a predetermined algorithm for each given RAM is applied to find the normalized RAM look-up addresses and identify the correct data for the exemplary imaging format conversion process.
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公开(公告)号：US11087530B2
公开(公告)日：2021-08-10
申请号：US16430268
申请日：2019-06-03
Applicant: GRASS VALLEY CANADA
Inventor： Ralph Andrew Silberstein , David Sahuc , Donald Johnson Childers
IPC: G06T17/00
Abstract: A method and system for providing access to and control of parameters within a scenegraph includes redefining components or nodes' semantic within a scenegraph. The set of components or nodes (depending on the scenegraph structure) are required to enable access from the Application User Interface to selected scenegraph information. In one embodiment, a user interface is generated for controlling the scenegraph parameters. In addition, constraints can be implemented that allow or disallow access to certain scenegraph parameters and restrict their range of values.
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公开(公告)号：US11079912B2
公开(公告)日：2021-08-03
申请号：US16146044
申请日：2018-09-28
Applicant: GRASS VALLEY CANADA
Inventor： Ralph Andrew Silberstein , Donald Johnson Childers , David Sahuc
IPC: G06F3/0484 , G06T13/00 , H04N5/262 , G11B27/034 , G06F3/0482
Abstract: A method and apparatus for enhancing digital video effects (DVE) operates to embed DVE functionality within a graphics modeling system and provides the user with an interface configured to present model elements to a user as controllable parameters. In order to embed DVE functionality, a dynamic data structure is introduced as a scene to allow the addition of user defined model elements. The user interface enables the identification of, and access to the newly introduced model elements.
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公开(公告)号：US11049229B2
公开(公告)日：2021-06-29
申请号：US16584854
申请日：2019-09-26
Applicant: GRASS VALLEY CANADA
Inventor： Jeroen Rotte , Dirk Snoeck-Henkemans , Petrus Gijsbertus Centen
Abstract: An apparatus for HDR image processing is provided. The apparatus determines an imaging sensitivity value. The apparatus then compares subsets of imaging information with the determined imaging sensitivity value and applies a gamma correction to each subset of imaging information using a gamma low contrast curve or a gamma high contrast curve based on the comparison to obtain the gamma corrected subset of imaging information.
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公开(公告)号：US10999190B2
公开(公告)日：2021-05-04
申请号：US16737682
申请日：2020-01-08
Applicant: GRASS VALLEY CANADA
Inventor： Frederick St-Laurent
IPC: H04L12/725 , G06F9/54 , H04L29/08 , H04L29/06 , H04L12/26 , H04L12/771 , H04L12/801 , H04L12/863
Abstract: A system and method is provided for timely and uniform real-time data packet transmission by a computing device. The system can include a shared packet memory buffer for storing data packets generated by a user application and a shared schedule memory buffer for storing packet identifiers and corresponding time slots for the data packets. Moreover, a kernel module is provided that operates in the kernel mode of the operating system directly above the network interface controller and can continuously poll the shared scheduled memory to access packet identifiers at corresponding time slots. Based on the packet identifiers in each time slot, the kernel module can pull the data packet having the packet identifier directly from the ring buffer and send each packet to the network interface controller for transmission as part of a media stream over a network to a media consuming device.
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Patent Agency Ranking
公开(公告)号：US20210036966A1
公开(公告)日：2021-02-04
申请号：US17073756
申请日：2020-10-19
Applicant: GRASS VALLEY CANADA
Inventor： Charles S. MEYER , Ken BUTTLE
IPC: H04L12/933 , H04N5/262 , H04L12/931 , H04L12/721 , H04L12/947
Abstract: A router fabric for switching real time broadcast video signals in a media processing network includes a logic device configured to route multiple channels of packetized video signals to another network device, a crossbar switch configured to be coupled to a plurality of input/output components and to switch video data of the multiple channels between the logic device and the plurality of input/output components in response to a control instruction, and a controller configured to map routing addresses for each video signal relative to the system clock, and to send the control instruction with the mapping to the crossbar switch and the logic device.
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公开(公告)号：US20200374422A1
公开(公告)日：2020-11-26
申请号：US16878356
申请日：2020-05-19
Applicant: GRASS VALLEY CANADA
Inventor： Yousuke TAKADA , Kenrou AWASHIMA , Yasunori NII , Yoshinobu ISHIMOTO
Abstract: A system is provided for synchronizing video clips with audio data. The system includes one or more video capture devices that captures audio and video data of a scene, and a data store for the audio data, the metadata, and the video data generated by each respective capture device. Moreover, the system includes an audio analyzer that analyzes the audio data to determine one or more groups of overlapping video clips in the video data and to generate offset information for each video clip in the one or more groups. A metadata analyzer then corrects the one or more groups of the overlapping video clips based on camera identification data, and a sequence generator generates a plurality of video sequences with synchronized audio, based on the corrected one or more groups.
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公开(公告)号：US10812412B2
公开(公告)日：2020-10-20
申请号：US16403430
申请日：2019-05-03
Applicant: GRASS VALLEY CANADA
Inventor： Charles S. Meyer , Ken Buttle
IPC: H04L12/933 , H04N5/262 , H04L12/931 , H04L12/721 , H04L12/947
Abstract: A router fabric for switching real time broadcast video signals in a media processing network includes a logic device configured to route multiple channels of packetized video signals to another network device, a crossbar switch configured to be coupled to a plurality of input/output components and to switch video data of the multiple channels between the logic device and the plurality of input/output components in response to a control instruction, and a controller configured to map routing addresses for each video signal relative to the system clock, and to send the control instruction with the mapping to the crossbar switch and the logic device.
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公开(公告)号：US10531034B2
公开(公告)日：2020-01-07
申请号：US15991116
申请日：2018-05-29
Applicant: GRASS VALLEY CANADA
Inventor： Jeroen Rotte , Petrus Gijsbertus Centen , Arnaud Defernez
IPC: H04N5/374 , H04N5/357 , H04N5/353 , H01L27/146 , H04N5/378 , H04N5/347 , H04N5/343 , H04N5/3745
Abstract: An image sensor that provides global shutter scanning with exposure time control during image capture. The image sensor includes a pixel array with shared pixel units that each include four photodiodes with a floating diffusion node shared therebetween and respective global shutter gates disposed between each photodiode and a supply voltage of the pixel array. Moreover, an image capture timing controller controls an exposure time of each photodiode by adjusting a width of a global shutter reset pulse applied to the plurality of global shutter gates after each readout cycle during image capture to change the respective exposure time of each shared pixel unit.
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20.发明申请公开(公告)号：US20190318448A1
公开(公告)日：2019-10-17
申请号：US15955237
申请日：2018-04-17
Applicant: GRASS VALLEY CANADA
Inventor： Giuseppe GIOVANNELLI
Abstract: A system and method that splices an initial 3D LUT for imaging format conversion into a plurality of smaller LUTs that can be stored in separate RAMs. During operation, the upper 5-bits serve as index values of each component of an incoming GBR pixel and are used to determine which of the smaller RAMs contain the correct index values for the pixel data. Specifically, a first index value can be derived from the incoming GBR pixel data and used to lookup all sub-cube vertices corresponding to the incoming pixel and the corresponding RAMs. After determining the correct RAMs, a predetermined algorithm for each given RAM is applied to find the normalized RAM look-up addresses and identify the correct data for the exemplary imaging format conversion process.
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