Abstract:
Systems, methods, and devices are disclosed, including an induction-motor controller having a phase path; a solid-state switch interposed on the phase path; and a controller coupled to the solid-state switch. In certain embodiments, the controller is configured to switch the solid-state switch so that the solid-state switch is conductive during a conduction angle of a cycle of an incoming AC power waveform conveyed by the phase path, calculate the conduction angle based on a generally sinusoidal reference value that has a frequency lower than a frequency of the incoming AC power waveform, and adjust the generally sinusoidal reference value based on a value indicative of flux in a load coupled to the phase path.
Abstract:
An induction motor controller that may include three phase paths leading from a power input to a power output, a solid-state switching device interposed between the power input and the power output on each of the three phase paths, a voltage sensor coupled to two of the phase paths between the solid-state switching device and the power input, a current sensor on one of the phase paths, a processor communicatively coupled to the voltage sensor, the current sensor, and the solid state switching device; and a memory coupled to the processor. The processor may be configured to calculate a motor parameter based on a signal from the voltage sensor and a signal from the current sensor and store the calculated motor parameter in memory.
Abstract:
A method and apparatus for reducing common mode noise in a three phase pulse width modulated (PWM) system, the method comprising the steps of receiving the first, second and third modulating waveforms, identifying one of the modulating waveforms that is at least one of instantaneously the maximum and instantaneously the minimum of the modulating waveforms as a first identified waveform, wherein comparison of the first identified waveform to the carrier signal would generate a first on-off pulse sequence associated with a phase corresponding to the first identified waveform, generating switch control signals associated with the phase corresponding to the first identified waveform that cause a modified on-off pulse sequence that is phase shifted from the first pulse sequence, using the second and third modulating waveforms to generate second and third on-off pulse sequences corresponding to the second and third phases and providing the modified pulse sequence and the second and third pulse sequences to the one of the inverter and the converter.
Abstract:
Multilevel inverters, power cells and bypass methods are presented in which a power cell switching circuit is selectively disconnected from the power cell output, and a bypass which is closed to connect first and second cell output terminals to selectively bypass a power stage of a multilevel inverter, with an optional AC input switch to selectively disconnect the AC input from the power cell switching circuit during bypass.
Abstract:
A double fed induction generator (DFIG) system and controller are presented in which the rotor side converter is preloaded with one or more initial values for resuming regulated operation to counteract transients upon deactivation of the crowbar protection circuit to provide grid fault ride through.
Abstract:
Systems, methods, and devices are disclosed, including an induction-motor controller having a phase path; a solid-state switch interposed on the phase path; and a controller coupled to the solid-state switch. In certain embodiments, the controller is configured to switch the solid-state switch so that the solid-state switch is conductive during a conduction angle of a cycle of an incoming AC power waveform conveyed by the phase path, calculate the conduction angle based on a generally sinusoidal reference value that has a frequency lower than a frequency of the incoming AC power waveform, and adjust the generally sinusoidal reference value based on a value indicative of flux in a load coupled to the phase path.
Abstract:
An induction motor controller that may include three phase paths leading from a power input to a power output, a solid-state switching device interposed between the power input and the power output on each of the three phase paths, a voltage sensor coupled to two of the phase paths between the solid-state switching device and the power input, a current sensor on one of the phase paths, a processor communicatively coupled to the voltage sensor, the current sensor, and the solid state switching device; and a memory coupled to the processor. The processor may be configured to calculate a motor parameter based on a signal from the voltage sensor and a signal from the current sensor and store the calculated motor parameter in memory.
Abstract:
An induction motor controller that may include three phase paths leading from a power input to a power output, a solid-state switching device interposed between the power input and the power output on each of the three phase paths, a voltage sensor coupled to two of the phase paths between the solid-state switching device and the power output, a current sensor on one of the phase paths, a processor communicatively coupled to the voltage sensor, the current sensor, and the solid state switching device; and a memory coupled to the processor. The processor may be configured to calculate a motor parameter based on a signal from the voltage sensor and a signal from the current sensor and store the calculated motor parameter in memory.
Abstract:
Methods and apparatus for reducing the common mode voltage generated by eliminating zero-voltage vectors in a rectifier/inverter variable frequency drive (VFD) system includes comparing three phase voltages to each other to determine a maximum voltage in one phase, a minimum voltage in another phase and a middle voltage in still another phase, inverting phase voltages for one phase having the maximum voltage and another phase having the minimum voltage, comparing the phase voltages to a carrier wave to determine gating signals for three respective phases of the inverter, and inverting gating signals for the one phase having the maximum voltage and for another phase having the minimum voltage to reduce the common mode voltage in the motor. In one embodiment, the zero-voltage vectors are removed by relating a first plurality of gating signals and a plurality of sector logic signals in a logic table to a second plurality of gating signals that are applied to phases of the inverter
Abstract:
A double fed induction generator (DFIG) converter method are presented in which rotor side current spikes are attenuated using series-connected damping resistance in response to grid fault occurrences or grid fault clearances.