Gene encoding cyclododecanone monooxygenase
    11.
    发明申请
    Gene encoding cyclododecanone monooxygenase 失效
    基因编码环十二酮单加氧酶

    公开(公告)号:US20070184531A1

    公开(公告)日:2007-08-09

    申请号:US11717247

    申请日:2007-03-13

    摘要: The invention relates to a new strain of Pseudomonas putida (designated as HI-70) and to the isolation, cloning, and sequencing of a cyclododecanone monooxygenase-encoding gene (named cdnB) from said strain. The invention also relates to a new cyclododecanone monooxygenase and to a method of use of the cyclododecanone monooxygenase-encoding gene.

    摘要翻译: 本发明涉及恶臭假单胞菌(称为HI-70)的新菌株,并且从所述菌株中分离,克隆和测序来自所述菌株的环十二酮单加氧酶编码基因(命名为cdnB)。 本发明还涉及新的环十二酮单加氧酶和使用环十二酮单加氧酶编码基因的方法。

    Cloning, sequencing and expression of a Comamonas cyclopentanone 1,2-monooxygenase-encoding gene in escherichia coli
    12.
    发明申请
    Cloning, sequencing and expression of a Comamonas cyclopentanone 1,2-monooxygenase-encoding gene in escherichia coli 失效
    在大肠杆菌中克隆,测序和表达一个Comamonas环戊酮1,2-单加氧酶编码基因

    公开(公告)号:US20070178558A1

    公开(公告)日:2007-08-02

    申请号:US11727730

    申请日:2007-03-28

    CPC分类号: C12N9/0073 C12Y114/13016

    摘要: Cyclopentanone 1,2-monooxygenase (CPMO) from Comamonas (previously Pseudomonas) sp. strain NCIMB 9872 carries out the second step of a degradation pathway that allows the bacterium to use cyclopentanol as a sole carbon source for growth. In the present invention there is reported the localization of the CPMO-encoding gene (cpnB) on a 4.3-kb SphI fragment, the determination of its sequence. The 550-amino acid CPMO polypeptide (Mr, 62,111) encoded by the gene was found to have 36.5% identity with the sequence of cyclohexanone 1,2-monooxygenase (CHMO) of Acinetobacter sp. strain NCIMB 9871. The 62-kDa CPMO was expressed in E. coli as an IPTG-inducible protein.

    摘要翻译: 来自Comamonas(以前为假单胞菌)的环戊酮1,2-单加氧酶(CPMO) 菌株NCIMB 9872进行降解途径的第二步,其允许细菌使用环戊醇作为生长的唯一碳源。 在本发明中,报道了CPMO编码基因(cpnB)在4.3kb SphI片段上的定位,确定其序列。 发现该基因编码的550个氨基酸的CPMO多肽(M >r,62,111)与不动杆菌属的环己酮1,2-单加氧酶(CHMO)的序列具有36.5%的同一性。 菌株NCIMB 9871.62-kDa CPMO在大肠杆菌中表达为IPTG诱导蛋白。

    Cloning, sequencing and expression of a comamonas cyclopentanone 1,2-monooxygenase-encoding gene in escherichia coli
    14.
    发明申请
    Cloning, sequencing and expression of a comamonas cyclopentanone 1,2-monooxygenase-encoding gene in escherichia coli 失效
    在大肠杆菌中克隆,测序和表达一个环戊烯酮-1,2-单加氧酶编码基因

    公开(公告)号:US20050089846A1

    公开(公告)日:2005-04-28

    申请号:US10312585

    申请日:2001-07-13

    CPC分类号: C12N9/0073 C12Y114/13016

    摘要: Cyclopentanone 1,2-monooxygenase (CPMO) from Comamonas (previously Pseudomonas) sp. strain NCIMB 9872 carries out the second step of a degradation pathway that allows the bacterium to use cyclopentanol as a sole carbon source for growth. In the present invention there is reported the localization of the CPMO-encoding gene (cpnB) on a 4.3-kb SphI fragment, the determination of its sequence. The 550-amino acid CPMO polypeptide (Mt, 62,111) encoded by the gene was found to have 36.5% identity with the sequence of cyclohexanone 1,2-monooxygenase (CHMO) of Acinetobacter sp. strain NCIMB 9871. The 62-kDa CPMO was expressed in E. coli as an IPTG-inducible protein.

    摘要翻译: 来自Comamonas(以前为假单胞菌)的环戊酮1,2-单加氧酶(CPMO) 菌株NCIMB 9872进行降解途径的第二步,其允许细菌使用环戊醇作为生长的唯一碳源。 在本发明中,报道了CPMO编码基因(cpnB)在4.3kb SphI片段上的定位,确定其序列。 发现由该基因编码的550个氨基酸的CPMO多肽(MATT,62,111)与不动杆菌属的环己酮1,2-单加氧酶(CHMO)的序列具有36.5%的同一性。 菌株NCIMB 9871.62-kDa CPMO在大肠杆菌中表达为IPTG诱导蛋白。

    Semiconductor memory device
    15.
    发明授权
    Semiconductor memory device 失效
    半导体存储器件

    公开(公告)号:US5998879A

    公开(公告)日:1999-12-07

    申请号:US17960

    申请日:1998-02-03

    CPC分类号: H01L27/1108 H01L27/1203

    摘要: In a CMOS SRAM cell formed on an SOI substrate and including a flip-flop having first and second NMOS and PMOS transistors, transfer gates having first and seconf MOS transistors, and a word line section, characterized in that:the word line section extends along a predetermined direction; that source and drain diffusion layer regions of the first and second NMOS and PMOS transistors are arranged along the predetermined direction, and gates of these NMOS and PMOS transistors are arranged on channel regions thereof in a direction perpendicular to the predetermined direction; that the gates of the first and second NMOS transistors are electrically connected to the gates of the first and second PMOS transistors, respectively; and that in regions between the gates of the first and second NMOS transistors on the channel regions and the gates of the first and second PMOS transistors on the channel regions, each of the drain diffusion layer regions of the fisrt and second NMOS and PMOS transistors, and each one of the drain and source diffusion layer regions of the first and second MOS transistors are respectively arranged to be adgacent to each other and are electrically connected to each other, respectively, through a diffusion layer interconnection.

    摘要翻译: 在形成在SOI衬底上并包括具有第一和第二NMOS和PMOS晶体管的触发器的CMOS SRAM单元中,具有第一和第二MOS晶体管的传输门和字线部分,其特征在于:字线部分沿着 预定方向; 第一和第二NMOS和PMOS晶体管的源极和漏极扩散层区域沿着预定方向排列,并且这些NMOS和PMOS晶体管的栅极在垂直于预定方向的方向上布置在沟道区域上; 第一和第二NMOS晶体管的栅极分别电连接到第一和第二PMOS晶体管的栅极; 并且在沟道区上的第一和第二NMOS晶体管的栅极和沟道区上的第一和第二PMOS晶体管的栅极之间的区域中,fisrt和第二NMOS和PMOS晶体管的漏极扩散层区域中的每一个, 并且第一和第二MOS晶体管的漏极和源极扩散层区域中的每一个分别布置成彼此相邻并且分别通过扩散层互连彼此电连接。

    Semiconductor memory device that can relief defective address
    16.
    发明申请
    Semiconductor memory device that can relief defective address 审中-公开
    可以缓解缺陷地址的半导体存储器件

    公开(公告)号:US20100157704A1

    公开(公告)日:2010-06-24

    申请号:US12654285

    申请日:2009-12-16

    申请人: Hiroaki Iwaki

    发明人: Hiroaki Iwaki

    IPC分类号: G11C29/00 G11C8/00 G11C17/16

    CPC分类号: G11C17/165 G11C29/84

    摘要: Plural nonvolatile address storing circuits hold address data. A serial transfer circuit sequentially transfers the address data stored in each of the nonvolatile address storing circuits. A serial reception circuit sequentially receives the address data transferred by the serial transfer circuit. An address latch circuit holds the address data received by the serial reception circuit. An address comparison circuit compares each of the address data stored in the address latch circuit with an input address, and determines whether each address data coincides with the input address.

    摘要翻译: 多个非易失性地址存储电路保存地址数据。 串行传送电路顺序传送存储在每个非易失性地址存储电路中的地址数据。 串行接收电路顺序地接收由串行传送电路传送的地址数据。 地址锁存电路保存串行接收电路所接收的地址数据。 地址比较电路将存储在地址锁存电路中的每个地址数据与输入地址进行比较,并确定每个地址数据是否与输入地址一致。

    Address generating circuit and semiconductor memory device
    17.
    发明申请
    Address generating circuit and semiconductor memory device 审中-公开
    地址发生电路和半导体存储器件

    公开(公告)号:US20090138537A1

    公开(公告)日:2009-05-28

    申请号:US12292257

    申请日:2008-11-14

    申请人: Hiroaki Iwaki

    发明人: Hiroaki Iwaki

    IPC分类号: G06F7/50

    CPC分类号: G06F7/507

    摘要: An address generating circuit includes a first carry look-ahead circuit for performing an operation using an inputted first carry and a first address and outputting a first output address and a first output carry respectively as a first operation result, a second carry look-ahead circuit for performing an operation using a carry fixed to 0 and a second address and outputting a second output address and a second output carry respectively as a second operation result, a third carry look-ahead circuit for performing an operation using a carry fixed to 1 and the second address and outputting a third output address and a third output carry respectively as a third operation result, and a first select circuit for selecting either of the second and third operation results based on the first output carry and outputting the selected operation result.

    摘要翻译: 地址发生电路包括:第一进位查找电路,用于执行使用输入的第一进位和第一地址的操作,并分别输出第一输出地址和第一输出进位作为第一运算结果;第二进位查找电路 用于执行使用进位固定为0和第二地址的操作,并分别输出第二输出地址和第二输出进位作为第二运算结果;第三进位查询电路,用于执行使用固定为1的运算和 所述第二地址分别输出第三输出地址和第三输出进位作为第三运算结果;以及第一选择电路,用于基于所述第一输出进位选择所述第二运算结果和所述运算结果中的任一个,并输出所选择的运算结果。