公开(公告)号：US07312658B2

公开(公告)日：2007-12-25

申请号：US11096798

申请日：2005-03-31

Applicant: Paolo Gatti ,  Marc Sabut

Inventor： Paolo Gatti ,  Marc Sabut

IPC: H03F3/45

CPC classification number: H03F3/45475 ,  H03F3/45179 ,  H03F2203/45521

Abstract: A differential amplifier having a first and second output terminals and receiving an input signal at an input terminal. The amplifier comprises a first amplifier having a first input connected to the input terminal, a second input and a first output connected together to the first output terminal, and a second output connected to the second output terminal, the first amplifier reproducing the input signal on the first output. The amplifier comprises a second amplifier having a first input receiving a reference signal and a second input connected to the output terminals by resistive elements and controlling the provision by the first amplifier on the second output of a signal such that the signals received at the first and second inputs of the second amplifier are equal.

Abstract translation: 一种具有第一和第二输出端并在输入端接收输入信号的差分放大器。 放大器包括：第一放大器，其具有连接到输入端的第一输入端，第二输入端和与第一输出端子连接在一起的第一输出端，​​以及连接到第二输出端子的第二输出端，第一放大器将输入信号再现在 第一个输出。 所述放大器包括具有接收参考信号的第一输入端的第二放大器和由电阻元件连接到所述输出端子的第二输入端，并且控制所述第一放大器在所述第二输出端提供的信号，使得在所述第一和 第二放大器的第二输入相等。

公开(公告)号：US20060226892A1

公开(公告)日：2006-10-12

申请号：US11401548

申请日：2006-04-11

Applicant: Jean-Luc Moro ,  Serge Ramet ,  Marc Sabut

Inventor： Jean-Luc Moro ,  Serge Ramet ,  Marc Sabut

IPC: G05F1/10

CPC classification number: G05F3/262

Abstract: A circuit for generating a reference current, including, between two terminals of application of a supply voltage: at least a first branch formed of at least a first and of at least a second transistors in series; at least a second branch formed of at least a third and of at least a fourth transistors in series with a switched-capacitance circuit.

Abstract translation: 一种用于产生参考电流的电路，包括施加电源电压的两个端子之间：至少由至少第一晶体管和至少第二晶体管串联形成的第一分支; 至少第二分支由至少三分之一和至少四个与开关电容电路串联的第四晶体管形成。

公开(公告)号：US20060170488A1

公开(公告)日：2006-08-03

申请号：US11340406

申请日：2006-01-26

Applicant: Marc Sabut ,  Jean-Luc Moro

Inventor： Marc Sabut ,  Jean-Luc Moro

IPC: G05F1/10

CPC classification number: G05F3/262 ,  G05F1/565

Abstract: A circuit of generation of a reference voltage by a first MOS transistor of a first type connected to a first terminal of application of a supply voltage. The first transistor is connected with a second MOS transistor of the same type controlled by an input stage of a transconductance amplifier and their junction point defines an output terminal providing the reference voltage. A first current source of fixed value connects the first supply terminal to the gate of the first transistor, a second current source of fixed value connecting the second transistor to a second terminal of application of the supply voltage.

Abstract translation: 通过连接到施加电源电压的第一端子的第一类型的第一MOS晶体管产生参考电压的电路。 第一晶体管与由跨导放大器的输入级控制的相同类型的第二MOS晶体管连接，并且其连接点限定提供参考电压的输出端子。 固定值的第一电流源将第一电源端连接到第一晶体管的栅极，固定值的第二电流源将第二晶体管连接到施加电源电压的第二端。

公开(公告)号：US06731159B2

公开(公告)日：2004-05-04

申请号：US10299159

申请日：2002-11-18

Applicant: Francois Van Zanten ,  Marc Sabut ,  Raymond Ribas

Inventor： Francois Van Zanten ,  Marc Sabut ,  Raymond Ribas

IPC: G05F326

CPC classification number: G05F3/262

Abstract: A mirroring circuit operating at high frequencies is provided. The mirroring circuit includes a first branch having a first transistor in series with a first resistor, a second branch having a second transistor in series with a second resistor, and a servo circuit for controlling current flowing in the first branch and the second branch. The servo circuit includes a third transistor configured as a diode, a source of the third transistor coupled to a source of the first transistor, a fourth transistor configured as a shift lever, a source of the fourth transistor coupled to ground via a third resistor, a fifth transistor configured as a diode, a source of the fifth transistor coupled to a source of the second transistor, and a sixth transistor configured as a shift lever, a source of the sixth transistor coupled to ground via the third resistor.

Abstract translation: 提供以高频操作的镜像电路。 镜像电路包括具有与第一电阻器串联的第一晶体管的第一分支，具有与第二电阻器串联的第二晶体管的第二分支和用于控制在第一分支和第二分支中流动的电流的伺服电路。 伺服电路包括被配置为二极管的第三晶体管，耦合到第一晶体管的源极的第三晶体管的源极，配置为变换杆的第四晶体管，经由第三电阻器耦合到地的第四晶体管的源极， 配置为二极管的第五晶体管，耦合到第二晶体管的源极的第五晶体管的源极和被配置为变换杆的第六晶体管，第六晶体管的源极经由第三电阻器耦合到地。

公开(公告)号：US20130002366A1

公开(公告)日：2013-01-03

申请号：US13537938

申请日：2012-06-29

Applicant: Marc Sabut ,  Severin Trochut ,  Christophe Curis

Inventor： Marc Sabut ,  Severin Trochut ,  Christophe Curis

IPC: H03K7/08

CPC classification number: H03K7/08 ,  H02M3/156

Abstract: A pulse width modulation device includes a switching transistor for defining modulation phases, a capacitor, and switches arranged to: a) in a first phase, charge the capacitor to a voltage corresponding to the on/off threshold of the switching transistor, and b) in a second phase, connect the capacitor between a terminal for applying a setpoint voltage and the gate of the switching transistor. A constant current source is connected to apply a current in the capacitor tending to bring the gate of the switching transistor toward the on/off threshold.

Abstract translation: 脉冲宽度调制装置包括用于定义调制相位的开关晶体管，电容器和布置成：a）在第一相位中，将电容器充电到与开关晶体管的导通/截止阈值相对应的电压，以及b） 在第二阶段中，在用于施加设定点电压的端子和开关晶体管的栅极之间连接电容器。 连接恒流源以在电容器中施加电流，以使开关晶体管的栅极朝向导通/截止阈值。

公开(公告)号：US08274419B2

公开(公告)日：2012-09-25

申请号：US12702970

申请日：2010-02-09

Applicant: Hugo Gicquel ,  Sophie Minot ,  Marc Sabut

Inventor： Hugo Gicquel ,  Sophie Minot ,  Marc Sabut

IPC: H03M1/42

CPC classification number: H03M1/164 ,  H03M1/187 ,  Y10T29/49002

Abstract: A device may include a programmable gain amplifier and an analog-digital converter with pipeline architecture having several stages. The first stage of the analog-digital converter may incorporate the programmable gain amplifier and an analog-digital conversion circuit with a programmable threshold.

Abstract translation: 器件可以包括可编程增益放大器和具有多级的管线架构的模数转换器。 模数转换器的第一级可以结合可编程增益放大器和具有可编程阈值的模数转换电路。

公开(公告)号：US08129967B2

公开(公告)日：2012-03-06

申请号：US12334996

申请日：2008-12-15

Applicant: Fabrice Blisson ,  Jean-Luc Moro ,  Marc Sabut

Inventor： Fabrice Blisson ,  Jean-Luc Moro ,  Marc Sabut

IPC: G05F1/00

CPC classification number: G05F1/56 ,  G05F1/575

Abstract: A voltage regulator includes an amplifier and a regulation loop. The regulator includes a first PMOS transistor connected to a terminal supplying an input voltage, a second PMOS transistor connected in series with the first PMOS transistor. A node between those two transistors defines an output terminal. A first source of a first polarization current of fixed value is connected to the gate of the first transistor, and a second source of a second polarization current of fixed value connects the second transistor to ground. A third NMOS transistor is connected between the two current sources. A circuit is provided to modify automatically at least one of the polarization currents in relation to the load current.

Abstract translation: 电压调节器包括放大器和调节回路。 调节器包括连接到提供输入电压的端子的第一PMOS晶体管，与第一PMOS晶体管串联连接的第二PMOS晶体管。 这两个晶体管之间的节点定义了输出端子。 固定值的第一极化电流的第一源连接到第一晶体管的栅极，固定值的第二极化电流的第二源将第二晶体管连接到地。 第三个NMOS晶体管连接在两个电流源之间。 提供电路以自动修改相对于负载电流的极化电流中的至少一个。

公开(公告)号：US20110205098A1

公开(公告)日：2011-08-25

申请号：US13002274

申请日：2009-06-22

Applicant: Marc Sabut ,  Hugo Gicquel ,  Fabien Reaute ,  François Van Zanten

Inventor： Marc Sabut ,  Hugo Gicquel ,  Fabien Reaute ,  François Van Zanten

IPC: H03M1/12 ,  H03F3/45

CPC classification number: H03F3/005

Abstract: A switched capacitor amplifier having an amplification unit adapted to amplify a differential signal; a first switched capacitor block including a first plurality of capacitors operable to sample a first differential input signal during a first sampling phase and to drive the amplification unit during a first drive phase; and a second switched capacitor block including a second plurality of capacitors operable to sample a second differential input signal during a second sampling phase and to drive the amplification unit during a second drive phase.

Abstract translation: 一种开关电容放大器，具有适于放大差分信号的放大单元; 第一开关电容器块，包括第一多个电容器，其可操作以在第一采样阶段期间对第一差分输入信号进行采样，并且在第一驱动阶段期间驱动所述放大单元; 以及包括第二多个电容器的第二开关电容器块，其可操作以在第二采样阶段期间对第二差分输入信号进行采样，并且在第二驱动阶段期间驱动放大单元。

公开(公告)号：US20100321082A1

公开(公告)日：2010-12-23

申请号：US12813972

申请日：2010-06-11

Applicant: Marc Sabut ,  Hugo Gicquel ,  Fabien Reaute

Inventor： Marc Sabut ,  Hugo Gicquel ,  Fabien Reaute

IPC: H03L5/00

CPC classification number: H03F3/005 ,  H03F3/45636 ,  H03F2203/45421

Abstract: The common-mode voltage of a switched-capacitor system is controlled by determining a current common-mode voltage of the switched-capacitor system, converting (in a flow-through conduction cell) the difference between the current common-mode voltage and a desired common-mode voltage into a resultant current, and reinjecting this resultant current into the switched-capacitor system via a resistive path.

Abstract translation: 开关电容器系统的共模电压通过确定开关电容器系统的电流共模电压来控制，（在流通导通单元中）转换电流共模电压与期望的电压之间的差 共模电压转换为合成电流，并通过电阻路径将该合成电流再注入开关电容器系统。

公开(公告)号：US07755927B2

公开(公告)日：2010-07-13

申请号：US11951001

申请日：2007-12-05

Applicant: Sébastien Barasinski ,  François Jacquet ,  Marc Sabut

Inventor： Sébastien Barasinski ,  François Jacquet ,  Marc Sabut

IPC: G11C11/00

CPC classification number: G11C11/419

Abstract: A memory device of SRAM type has a memory plan constituted by base memory cells organized in lines and in columns. Each cell of a column is connected between two bit lines which are precharged during a reading operation. Circuitry is provided for generating a precharge voltage of the bit lines which is less than a nominal supply voltage of the device.

Abstract translation: SRAM类型的存储器件具有由以行和列组织的基本存储器单元构成的存储器计划。 列的每个单元连接在读取操作期间预充电的两个位线之间。 电路被提供用于产生位线的预充电电压，其小于设备的额定电源电压。