公开(公告)号：US20150009059A1

公开(公告)日：2015-01-08

申请号：US14021735

申请日：2013-09-09

Applicant: Broadcom Corporation

Inventor： Chun-Ying Chen ,  Wei-Ta Shih ,  Rong Wu ,  Young Shin ,  Karthik Raviprakash ,  Tao Wang ,  Chia-Jen Hsu ,  Tianwei Li

IPC: H03M1/12

CPC classification number: H03M1/187 ,  H03M1/00 ,  H03M1/0695 ,  H03M1/1215 ,  H03M1/144 ,  H03M1/164

Abstract: A system includes a pipeline analog-to-digital converter as a first stage to process an input signal, and a successive approximation register (SAR) analog-to-digital converter as a second stage to process the input signal. The SAR analog-to-digital converter includes a power adjustment element to adjust a reference voltage of the SAR analog-to-digital converter to match a full scale voltage of the pipeline-analog-to-digital converter.

Abstract translation: 系统包括作为处理输入信号的第一级的流水线模数转换器和用于处理输入信号的逐次逼近寄存器（SAR）模数转换器作为第二级。 SAR模数转换器包括功率调整元件，用于调整SAR模数转换器的参考电压，以匹配流水线模数转换器的满量程电压。

公开(公告)号：US07990301B2

公开(公告)日：2011-08-02

申请号：US12241879

申请日：2008-09-30

Applicant: Tony M. Nygard ,  Helmut C. Eder ,  Van Herck Koen

Inventor： Tony M. Nygard ,  Helmut C. Eder ,  Van Herck Koen

IPC: H03M1/12

CPC classification number: H03M1/187

Abstract: A low-power, high-dynamic range, analog-to-digital (A/D) conversion circuit for converting an analog signal to a digital signal having a controllable amplifier for amplifying the analog signal received at an input of the amplifier in response to a first control signal and for generating an amplified analog signal, a low dynamic range A/D converter for converting the amplified analog signal to an intermediary digital signal, a controllable bit shift register for scaling the intermediary digital signal in response to a second control signal to generate the digital signal, and a gain control component (AGC) for generating the first control signal to cause the amplified analog signal to be within the dynamic range of the A/D converter and for generating the second control signal to cause the scaling to compensate for the amplification by the amplifier.

Abstract translation: 一种用于将模拟信号转换为具有可控放大器的数字信号的低功率，高动态范围的模数（A / D）转换电路，用于放大在放大器的输入处接收的模拟信号，以响应于 第一控制信号和用于产生放大模拟信号的低动态范围A / D转换器，用于将放大的模拟信号转换成中间数字信号;可控位移寄存器，用于响应于第二控制信号对中间数字信号进行缩放 以产生所述数字信号;以及增益控制部件（AGC），用于产生所述第一控制信号以使所述放大的模拟信号在所述A / D转换器的动态范围内，并且用于产生所述第二控制信号以使所述缩放 补偿放大器的放大。

公开(公告)号：US20100225509A1

公开(公告)日：2010-09-09

申请号：US12702970

申请日：2010-02-09

Applicant: Hugo Gicquel ,  Sophie Minot ,  Marc Sabut

Inventor： Hugo Gicquel ,  Sophie Minot ,  Marc Sabut

IPC: H03M1/00 ,  H03M1/12 ,  H03M1/34 ,  H05K13/00

CPC classification number: H03M1/164 ,  H03M1/187 ,  Y10T29/49002

Abstract: A device may include a programmable gain amplifier and an analog-digital converter with pipeline architecture having several stages. The first stage of the analog-digital converter may incorporate the programmable gain amplifier and an analog-digital conversion circuit with a programmable threshold.

Abstract translation: 器件可以包括可编程增益放大器和具有多级的管线架构的模数转换器。 模数转换器的第一级可以结合可编程增益放大器和具有可编程阈值的模数转换电路。

公开(公告)号：US06963733B2

公开(公告)日：2005-11-08

申请号：US09984879

申请日：2001-10-31

Applicant: Patrik Eriksson ,  Mats Eriksson

Inventor： Patrik Eriksson ,  Mats Eriksson

IPC: H03G1/00 ,  H03G1/04 ,  H03G3/00 ,  H03G3/30 ,  H03M1/18 ,  H04B17/02 ,  H04B1/06 ,  H04B7/00

CPC classification number: H03G3/3089 ,  H03G1/0023 ,  H03G1/04 ,  H03G3/001 ,  H03M1/187

Abstract: The present invention reduces automatic gain control (AGC) transients using first and second AGC processing branches to receive a signal. A gain is selectively adjusted (if desired) in the one of the AGC processing branches during a first time period. However, a gain is not adjusted in the other AGC processing branch during that first time period. The signals generated by the first and second AGC processing branches are then diversity processed to generate a received signal. The diversity processing effectively reduces the effect of any AGC transient.

Abstract translation: 本发明使用第一和第二AGC处理分支减少自动增益控制（AGC）瞬变以接收信号。 在第一时间段期间，AGC处理分支中的一个AGC选择性地调整增益（如果需要）。 然而，在该第一时间段期间，其他AGC处理分支中的增益没有被调整。 然后对由第一和第二AGC处理分支产生的信号进行分集处理以产生接收信号。 分集处理有效地降低了任何AGC瞬变的影响。

公开(公告)号：US20040246154A1

公开(公告)日：2004-12-09

申请号：US10853113

申请日：2004-05-26

Inventor： Fabien Aeby ,  Laurent Genilloud

IPC: H03M001/62

CPC classification number: H04N5/235 ,  H03M1/187 ,  H04N5/335

Abstract: The variable gain analog-to-digital conversion device (1) for an image sensor comprises at least one N-bit non-linear coarse first converter (21) receiving a pixel voltage signal (Vpix) and at least one M-bit linear fine second converter (22) connected to the first converter (21) in order for the device to supply a binary word of NnullM bits relating to the voltage level of the pixel. The first converter (21) comprises comparison means (33) for comparing the voltage level of the pixel with one or more voltage thresholds (V0 to V4) delimiting voltage ranges within the voltage dynamic range of the sensor. The successive voltage ranges represent areas of illumination of the pixel ranging from a weakly lit area to a strongly lit area. The first comparator supplies an N-bit binary word relating to the area of illumination determined for the pixel. The second converter comprises conversion adaptation means for converting the voltage pixel signal to a number of bits less than or equal to M, depending on the N-bit binary word from the first converter.

Abstract translation: 用于图像传感器的可变增益模数转换装置（1）包括至少一个接收像素电压信号（Vpix）的N位非线性粗略第一转换器（21）和至少一个M位线性精细 第二转换器（22），连接到第一转换器（21），以便器件提供与像素的电压电平相关的N + M位的二进制字。 第一转换器（21）包括比较装置（33），用于将像素的电压电平与限定传感器的电压动态范围内的电压范围的一个或多个电压阈值（V0至V4）进行比较。 连续的电压范围表示从弱光区域到强光区域的像素的照明区域。 第一比较器提供与为像素确定的照明面积相关的N位二进制字。 第二转换器包括转换适配装置，用于根据来自第一转换器的N位二进制字将电压像素信号转换成小于或等于M的位数。

公开(公告)号：US06741194B1

公开(公告)日：2004-05-25

申请号：US10328360

申请日：2002-12-23

Applicant: Thierry Cassagnes ,  Douglas A. Garrity ,  Ira G. Miller

Inventor： Thierry Cassagnes ,  Douglas A. Garrity ,  Ira G. Miller

IPC: H03M106

CPC classification number: H03M1/183 ,  H03M1/0695 ,  H03M1/129 ,  H03M1/187 ,  H03M1/44

Abstract: An analog-to-digital (A/D) converter suitable for use with redundant signed digit (RSD) coverter stages is provided with an out-of-range (OOR) detection circuit. If an out-of-range input signal is detected, the detection circuit identifies the OOR condition so that the converter can take remedial action. Examples of remedial action may include adjusting the gain of one or more converter stages, adjusting the analog input signal provided to one or more converter stages, and/or adjusting the digital output of the converter to reflect the OOR condition. The ORR detection circuit may receive its input from a converter stage that is distinct from the stage providing the most significant bit (MSB) of the digital output to preserve the resolution of the most significant bit.

Abstract translation: 适用于冗余有符号数字（RSD）覆盖器级的模拟（A / D）转换器提供超范围（OOR）检测电路。 如果检测到超出范围的输入信号，则检测电路识别OOR条件，以便转换器可以采取补救措施。 补救措施的示例可以包括调整一个或多个转换器级的增益，调整提供给一个或多个转换器级的模拟输入信号和/或调整转换器的数字输出以反映OOR条件。 ORR检测电路可以从与提供数字输出的最高有效位（MSB）的级不同的转换器级接收其输入，以保持最高有效位的分辨率。

公开(公告)号：US06590437B2

公开(公告)日：2003-07-08

申请号：US10061993

申请日：2002-02-01

Applicant: Katsumi Imai

Inventor： Katsumi Imai

IPC: G06F7556

CPC classification number: G06G7/24 ,  H03G3/001 ,  H03M1/187

Abstract: Plurality of linear amplifiers A1, A2, and A3, input signal is applied to these linear amplifiers A1, A2, and A3 and is applied to a comparator 30 carrying out level detection, and only any one of the linear amplifiers is switched to operate corresponding to input signal level.

公开(公告)号：US20030083031A1

公开(公告)日：2003-05-01

申请号：US09984879

申请日：2001-10-31

Inventor： Patrik Eriksson ,  Mats Eriksson

IPC: H04B007/00

CPC classification number: H03G3/3089 ,  H03G1/0023 ,  H03G1/04 ,  H03G3/001 ,  H03M1/187

Abstract: The present invention reduces automatic gain control (AGC) transients using first and second AGC processing branches to receive a signal. A gain is selectively adjusted (if desired) in the one of the AGC processing branches during a first time period. However, a gain is not adjusted in the other AGC processing branch during that first time period. The signals generated by the first and second AGC processing branches are then diversity processed to generate a received signal. The diversity processing effectively reduces the effect of any AGC transient.

Abstract translation: 本发明使用第一和第二AGC处理分支减少自动增益控制（AGC）瞬变以接收信号。 在第一时间段期间，AGC处理分支中的一个AGC选择性地调整增益（如果需要）。 然而，在该第一时间段期间，其他AGC处理分支中的增益没有被调整。 然后对由第一和第二AGC处理分支产生的信号进行分集处理以产生接收信号。 分集处理有效地降低了任何AGC瞬变的影响。

公开(公告)号：US5422643A

公开(公告)日：1995-06-06

申请号：US21435

申请日：1993-02-24

Applicant: Ching Chu ,  Steven Prowse ,  John Haywood

Inventor： Ching Chu ,  Steven Prowse ,  John Haywood

IPC: G01M11/00 ,  H03M1/18

CPC classification number: G01M11/3145 ,  H03M1/187

Abstract: A digitizer suitable for digitizing input signals having a high dynamic range. The digitizer is microprocessor controlled and comprises an input stage, a multi-channel attenuator or amplifier bank, a multiplexer and a analog-to-digital (A/D) converter. The function of the multi-channel bank is to move the input signal within the range of the A/D converter. The input signal to be digitized is fed through the input stage to each of the channels in the attenuator bank. The signal is scaled by each respective channel in the attenuator bank. The multiplexer is used to switch the scaled signal which is within the range of the A/D converter for digitizing. The digitized sample is then corrected according to the attenuation or gain factor of the scaled channel. The digitizer includes a comparator bank which is used to determine the channel with the widest signal range within the range of the A/D converter. The digitizer also includes a channel calibrator for calibrating the actual gain or attenuation of each channel. In another aspect, the digitizer can be implemented using an optical front-end comprising an optical beam splitter, optical attenuators and amplifier banks. The optical front-end provides improved noise immunity and faster speed of operation.

Abstract translation: 适用于数字化具有高动态范围的输入信号的数字转换器。 数字转换器由微处理器控制，包括输入级，多通道衰减器或放大器组，多路复用器和模拟（A / D）转换器。 多通道组的功能是在A / D转换器的范围内移动输入信号。 要被数字化的输入信号通过输入级馈送到衰减器组中的每个通道。 信号由衰减器组中的每个相应通道进行缩放。 多路复用器用于切换在A / D转换器范围内的缩放信号进行数字化。 然后根据缩放的通道的衰减或增益因子校正数字化采样。 数字转换器包括一个比较器组，用于确定A / D转换器范围内最宽信号范围的通道。 数字转换器还包括用于校准每个通道的实际增益或衰减的通道校准器。 在另一方面，可以使用包括光分束器，光衰减器和放大器组的光学前端来实现数字化仪。 光学前端提供更好的抗噪声能力和更快的操作速度。

公开(公告)号：US4990913A

公开(公告)日：1991-02-05

申请号：US299313

申请日：1989-01-23

Applicant: Claude Beauducel

Inventor： Claude Beauducel

IPC: G01V1/28 ,  H03M1/00 ,  H03M1/18

CPC classification number: H03M1/187

Abstract: An acquisition device for digitizing highly dynamic signals. After amplification in a fixed gain amplifier, the signals are applied to a sample and hold unit, the output of which is connected to an analog-to-digital converter to which a variable reference voltage is applied. This reference voltage is available at the output of a multiplexer to the inputs of which voltages are applied derived from sub-divisions of a calibrated voltage. The choice of the reference voltage is effected by a logic assembly as a function of the comparisons made by comparators between the sampled voltage and the derived voltages. The digitized signals are represented by a digital word from the converter and a digital word of gain G from the logic assembly.

Abstract translation: 用于数字化高动态信号的采集设备。 在固定增益放大器中放大后，信号被施加到采样和保持单元，其输出端连接到施加了可变参考电压的模数转换器。 该参考电压在多路复用器的输出端可用于从校准电压的子分段导出的电压的输入。 参考电压的选择是由逻辑组件作为比较器在采样电压和导出电压之间进行比较的函数来实现的。 数字化信号由来自转换器的数字字和来自逻辑组件的增益G的数字字代表。