BUS LOW VOLTAGE DIFFERENTIAL SIGNALING (BLVDS) CIRCUIT
    11.
    发明申请
    BUS LOW VOLTAGE DIFFERENTIAL SIGNALING (BLVDS) CIRCUIT 有权
    总线低电压差分信号(BLVDS)电路

    公开(公告)号:US20110012646A1

    公开(公告)日:2011-01-20

    申请号:US12505471

    申请日:2009-07-18

    IPC分类号: H03K3/00

    摘要: A differential signaling circuit and a control circuit. The differential signaling circuit includes a first positive driver and a first negative driver. The first negative driver has different impedance than the first positive driver. The first positive driver and the first negative driver together define a first current path between positive and negative power supply terminals. A first output is defined on the first current path intermediate the first positive driver and the first negative driver. The control circuit includes a first driver that drives a transmission line at a first output voltage, a feedback amplifier responsive to the first output voltage to generate a control signal and a metal oxide semiconductor (MOS) driver coupled to the first driver and responsive to the control signal to make impedance of the first driver equivalent to impedance of the transmission line.

    摘要翻译: 差分信号电路和控制电路。 差分信号电路包括第一正驱动器和第一负驱动器。 第一个负极驱动器具有与第一个正极驱动器不同的阻抗。 第一正驱动器和第一负驱动器一起定义正电源端子和负电源端子之间的第一电流路径。 第一输出定义在第一正驱动器和第一负驱动器之间的第一电流通路上。 控制电路包括驱动第一输出电压的传输线的第一驱动器,响应第一输出电压产生控制信号的反馈放大器和耦合到第一驱动器的金属氧化物半导体(MOS)驱动器,并响应于 控制信号使第一驱动器的阻抗等于传输线的阻抗。

    Power on reset generation circuits in integrated circuits
    12.
    发明授权
    Power on reset generation circuits in integrated circuits 有权
    集成电路中的上电复位发生电路

    公开(公告)号:US08680901B2

    公开(公告)日:2014-03-25

    申请号:US13567611

    申请日:2012-08-06

    IPC分类号: H03L7/06

    CPC分类号: G01R21/00 H03K17/223 H03L7/00

    摘要: Integrated Circuits (ICs) comprising circuits configured to generate a power on reset (POR) pulse are disclosed. An IC comprises a power supply sense circuit configured to generate a sense signal in response to a transition of a power supply signal from a first level to a second level, and a pulse generation circuit coupled with the power supply sense circuit. The pulse generation circuit is configured to generate a power on reset (POR) pulse of a threshold duration based on the sense signal. The IC further includes a reset generation circuit coupled with the pulse generation circuit to receive the POR pulse. The reset generation circuit is configured to generate a reset pulse based on the POR signal and of at least one control signal, where the reset pulse is configured to be utilized to perform a reset of one or more elements of the integrated circuit.

    摘要翻译: 公开了包括被配置为产生上电复位(POR)脉冲的电路的集成电路(IC)。 IC包括电源检测电路,其被配置为响应于电源信号从第一电平到第二电平的转变而产生感测信号,以及脉冲发生电路与电源检测电路耦合。 脉冲发生电路被配置为基于感测信号产生阈值持续时间的上电复位(POR)脉冲。 IC还包括与脉冲发生电路耦合以接收POR脉冲的复位产生电路。 复位产生电路被配置为基于POR信号和至少一个控制信号产生复位脉冲,其中复位脉冲被配置为用于执行集成电路的一个或多个元件的复位。

    SELECTABLE DRIVE STRENGTH HIGH FREQUENCY CRYSTAL OSCILLATOR CIRCUIT
    13.
    发明申请
    SELECTABLE DRIVE STRENGTH HIGH FREQUENCY CRYSTAL OSCILLATOR CIRCUIT 审中-公开
    可选驱动强度高频晶振振荡器电路

    公开(公告)号:US20100026403A1

    公开(公告)日:2010-02-04

    申请号:US12181394

    申请日:2008-07-29

    IPC分类号: H03B5/30 H03B5/32

    摘要: A method, system, and apparatus to a selectable drive strength high frequency crystal oscillator circuit are disclosed. In one embodiment, a system includes a crystal oscillator circuit to generate a signal with a specified frequency value, and a programmable amplifier circuit containing a plurality of programmable inverting amplifiers, and wherein certain ones of a plurality of inverting amplifiers are operated to change a gain and/or a bandwidth of the signal according to the specified frequency value of the crystal oscillator circuit. The system may include further comprising a resistor circuit coupled in parallel to the programmable amplifier circuit to set an operating point of the programmable amplifier circuit.

    摘要翻译: 公开了一种可选择的驱动强度高频晶体振荡器电路的方法,系统和装置。 在一个实施例中,系统包括用于产生具有指定频率值的信号的晶体振荡器电路和包含多个可编程反相放大器的可编程放大器电路,并且其中操作多个反相放大器中的某些以改变增益 和/或根据晶体振荡器电路的规定频率值的信号的带宽。 该系统可以进一步包括与可编程放大器电路并联耦合以设置可编程放大器电路的工作点的电阻器电路。

    CIRCUIT TO GENERATE CMOS LEVEL SIGNAL TO TRACK CORE SUPPLY VOLTAGE (VDD) LEVEL
    14.
    发明申请
    CIRCUIT TO GENERATE CMOS LEVEL SIGNAL TO TRACK CORE SUPPLY VOLTAGE (VDD) LEVEL 审中-公开
    产生CMOS电平信号以跟踪核心电源电压(VDD)电平的电路

    公开(公告)号:US20100026375A1

    公开(公告)日:2010-02-04

    申请号:US12181334

    申请日:2008-07-29

    IPC分类号: G05F1/10

    摘要: A method, system, and apparatus circuit to generate CMOS level signal to track core supply voltage (VDD) level are disclosed. In one embodiment, a system of an integrated circuit includes an HHV generation circuit located in the integrated circuit to provide an HHV voltage signal to a subsystem circuit of the integrated circuit to replace a core voltage signal used by the subsystem circuit when the core voltage signal is below a specified value, an core voltage source located within the integrated circuit to provide the core voltage signal to the HHV generation circuit, and an external voltage source to provide an external voltage signal of an other entity located outside the integrated circuit to the HHV generation circuit. The system may include a pad driver circuit configured to associate the integrated circuit with the other entity.

    摘要翻译: 公开了一种用于产生CMOS电平信号以跟踪核心电源电压(VDD)电平的方法,系统和装置电路。 在一个实施例中,集成电路的系统包括位于集成电路中的HHV产生电路,以在集成电路的子系统电路提供HHV电压信号以替代核心电压信号时由子系统电路使用的核心电压信号 位于集成电路内的核心电压源,以向HHV生成电路提供核心电压信号;以及外部电压源,用于向位于集成电路外部的另一实体提供外部电压信号至HHV 一代电路。 该系统可以包括配置成将集成电路与另一实体相关联的焊盘驱动器电路。

    SECURE AND RELIABLE POLICY ENFORCEMENT
    15.
    发明申请
    SECURE AND RELIABLE POLICY ENFORCEMENT 有权
    安全可靠的政策执行

    公开(公告)号:US20080080493A1

    公开(公告)日:2008-04-03

    申请号:US11537196

    申请日:2006-09-29

    IPC分类号: H04L12/56

    CPC分类号: H04L63/0263

    摘要: A system includes a policy enforcement point that is located within a first network. The policy enforcement point is configured to connect the first network to a second network via a secure connection. The policy enforcement point is configured to receive traffic from a first device via the first network or a second device associated with the second network via the secure connection, determine whether to apply a policy to the received traffic, and discard the received traffic when a policy is determined to apply to the received traffic.

    摘要翻译: 系统包括位于第一网络内的策略执行点。 策略执行点被配置为经由安全连接将第一网络连接到第二网络。 策略执行点被配置为经由第一网络或经由安全连接与第二网络相关联的第二设备接收来自第一设备的流量,确定是否对所接收到的流量应用策略,并且在策略中丢弃所接收的流量 被确定为应用于所接收的流量。