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公开(公告)号：US11049886B2
公开(公告)日：2021-06-29
申请号：US16684552
申请日：2019-11-14
Inventor： Xiaowen Lv
Abstract: A thin film transistor array substrate includes: a substrate on which a thin film transistor and a storage capacitor are formed. The storage capacitor includes a first electrode plate formed on the substrate, a gate isolation layer or an etching stopper layer formed on the first electrode plate, and a second electrode plate formed on the gate isolation layer or the etching stopper layer. The etching stopper layer may be formed on the gate isolation layer, of which one is partially etched and removed such that there is only one of the gate isolation layer and the etching stopper layer existing between the two electrode plates of the storage capacitor so as to reduce the overall thickness of the isolation layer of the storage capacitor. Thus, the capacitor occupies a smaller area and a higher aperture ratio may be achieved.
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公开(公告)号：US11049883B2
公开(公告)日：2021-06-29
申请号：US16099181
申请日：2018-09-14
Inventor： Liyang An
IPC: H01L27/12 , G02F1/1362 , G02F1/1368 , H01L21/66
Abstract: The invention provides a COA type array substrate and a method for measuring via size on color-resist layer. The COA type array substrate is formed by designing a drain of the TFT comprising a drain body corresponding to a first via of the color-resist layer, and a first extending portion, a second extending portion and a third extending portion formed by outwardly protruding from edge of the drain body, able to improve the measurement accuracy of the size of the first via on the color-resist layer, thereby improving the production yield of the COA type array substrate.
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公开(公告)号：US11037514B2
公开(公告)日：2021-06-15
申请号：US16312287
申请日：2018-09-26
Inventor： Peng Du
IPC: G09G3/36
Abstract: The invention provides a GOA circuit for display panel. The GOA circuit comprises a plurality of cascaded GOA units, for n and m, a pull-up control circuit of n-th stage GOA unit comprising: a first TFT(T1) having gate connected to (n+m)-th stage scan signal, source and drain respectively connected to high voltage and gate signal node; a second TFT(T2), having floating gate and reserved welding pad for connecting start signal(STV), source and drain respectively connected to high voltage and gate signal node; a pull-down control circuit comprising: a third TFT(T4), having gate connected to (n−m)th stage scan signal, source and drain respectively connected to n-th stage scan signal and low voltage; a fourth TFT(T5), having gate connected to (n−m)th stage scan signal, source and drain connected to gate signal node and low voltage respectively. The invention realizes the cutting of display panel into strip screens of any aspect ratio.
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公开(公告)号：US11024679B2
公开(公告)日：2021-06-01
申请号：US16307136
申请日：2018-09-14
Inventor： Hui Huang
Abstract: The present invention teaches a CF substrate, its manufacturing method, and a WOLED display device. The CF substrate includes a substrate, a pixel definition layer, and multiple filter patterns. The pixel definition layer has multiple openings, each corresponding to a sub-pixel area of the substrate. Each filter pattern is disposed on the substrate inside an opening of the pixel definition layer, and includes a quantum dot layer and a filter layer sequentially formed on the substrate. The CF substrate requires a single lithographic process to form the openings. The quantum dot layers and filter layers of the filter patterns are then formed by solution film formation in the openings, effectively simplifying the manufacturing process and enhancing the production efficiency. Applying the CF substrate to a WOLED display device also enhances the lighting efficiency, color gamut, and product quality of the WOLED display device.
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公开(公告)号：US11011128B1
公开(公告)日：2021-05-18
申请号：US16319818
申请日：2018-09-27
Inventor： Xiang Gao
IPC: G09G3/36
Abstract: The present invention teaches a GOA circuit driving method and a GOA circuit driving device. Through the configuration of a buffer capacitor electrically connected to the level shift IC, the level shift IC connects to the buffer capacitor and switches to the transition level during shifting the target clock signals from high to low level or from low to high level. Through the buffer capacitor, the present invention is able to keep the transition level always equal to one half of the sum of the low voltage and the high voltage, thereby maximizing reduction of power consumption and feedthrough effect of the GOA circuit.
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Patent Agency Ranking
公开(公告)号：US20210118397A1
公开(公告)日：2021-04-22
申请号：US16312286
申请日：2018-09-26
Inventor： Shuai Chen
IPC: G09G3/36
Abstract: The invention provides a voltage output system and LCD device. The voltage output system is disposed with a variable resistor, one end of the variable resistor is connected to the input voltage transmitted by the level-shifting unit through a contact and a wire, and the other end of the variable resistor is electrically connected to the LCD panel to output an output voltage through a contact and a wire. After the voltage output system is disposed on the assembled circuit board of the LCD device, when the LCD device is tested, the output voltage of the voltage output system can be preset by adjusting the resistance of the variable resistor so that the required different voltages can be provided to the LCD panel conveniently and quickly, which simplifies the test of the LCD device and reduces the product cost.
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公开(公告)号：US10984750B1
公开(公告)日：2021-04-20
申请号：US16312286
申请日：2018-09-26
Inventor： Shuai Chen
Abstract: The invention provides a voltage output system and LCD device. The voltage output system is disposed with a variable resistor, one end of the variable resistor is connected to the input voltage transmitted by the level-shifting unit through a contact and a wire, and the other end of the variable resistor is electrically connected to the LCD panel to output an output voltage through a contact and a wire. After the voltage output system is disposed on the assembled circuit board of the LCD device, when the LCD device is tested, the output voltage of the voltage output system can be preset by adjusting the resistance of the variable resistor so that the required different voltages can be provided to the LCD panel conveniently and quickly, which simplifies the test of the LCD device and reduces the product cost.
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18.发明申请公开(公告)号：US20210103191A1
公开(公告)日：2021-04-08
申请号：US16079200
申请日：2018-07-16
Inventor： Wenbo LIU
IPC: G02F1/1362 , G02F1/1368 , G02F1/1343 , G02F1/1335
Abstract: An array substrate for a liquid crystal display is disclosed. The array substrate includes: a substrate including multiple pixel portions; multiple thin-film transistors disposed in the pixel portions; multiple color filters, and the color filter is disposed in the pixel portion, wherein the multiple color filters includes a transparent color filter and/or a white color filter, colors of the transparent color filter and the white color filter are changed to a first color when a voltage is applied, and the first color is different from the other color filters except the transparent color filters and the white color filters in the multiple color filters; multiple transparent electrodes deposed between the transparent color filters and/or the white color filters and the pixel portions; and multiple pixel electrodes connected to the multiple thin-film transistors. The present invention can increase the color gamut range of the liquid crystal display.
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公开(公告)号：US10971480B2
公开(公告)日：2021-04-06
申请号：US15763184
申请日：2018-01-18
Inventor： Zhiwu Wang
IPC: H01L25/075 , H01L27/12 , H01L29/786 , H01L33/62
Abstract: The present invention provides a display panel and a manufacturing method thereof. The display panel comprises a micro light emitting diode and a thin film transistor electrically coupled to the micro light emitting diode. The micro light emitting diode comprises a P type semiconductor and a N type semiconductor. The P type semiconductor is close to the thin film transistor and the N type semiconductor is configured at one side of the P type semiconductor away from the thin film transistor. One surface of the N type semiconductor away from the P type semiconductor is roughened by a plasma surface treatment process. Since a thickness of the N type semiconductor is larger than a thickness of the P type semiconductor, the crystal quality of material of the N type semiconductor will not be affected as the N type semiconductor is roughened to increase the light efficiency.
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公开(公告)号：US20210096432A1
公开(公告)日：2021-04-01
申请号：US16099181
申请日：2018-09-14
Inventor： Liyang An
IPC: G02F1/1362 , H01L27/12 , G02F1/1368
Abstract: The invention provides a COA type array substrate and a method for measuring via size on color-resist layer. The COA type array substrate is formed by designing a drain of the TFT comprising a drain body corresponding to a first via of the color-resist layer, and a first extending portion, a second extending portion and a third extending portion formed by outwardly protruding from edge of the drain body, able to improve the measurement accuracy of the size of the first via on the color-resist layer, thereby improving the production yield of the COA type array substrate.
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