Programmable distributed digital switch system
    11.
    发明授权
    Programmable distributed digital switch system 失效
    可编程分布式数字交换机系统

    公开(公告)号:US6091714A

    公开(公告)日:2000-07-18

    申请号:US853041

    申请日:1997-04-30

    摘要: A distributed digital switching system is provided that includes a plurality of service controllers (20) which are interconnected to each other through a network (10). A network arbitrator is provided that controls the flow of traffic on the network (10). Each of the service controllers (20) is operable to provide a switching configuration between inbound data to the service controller (20) and network terminations associated with each of the service controllers (20). A processor (150) on each of the service controllers (20) controls the operations thereof with the voice information stored in a memory (208) which can be configured with a circuit (204). Each of the service controllers (20) has associated therewith a conference circuit for defining and creating a conference that can access all inbound data and provide interconnections therebetween and output this on a single outbound conference channel. There can be multiple conferences created at each service controller (20). Each of the conferences on the network can be accessed with a single associated conference address, such that only one address need be defined on the network for a given conference.

    摘要翻译: 提供一种分布式数字交换系统,其包括通过网络(10)彼此互连的多个服务控制器(20)。 提供一种网络仲裁器来控制网络上的业务流(10)。 每个服务控制器(20)可操作以在向服务控制器(20)的入站数据和与每个服务控制器(20)相关联的网络终端之间提供切换配置。 每个服务控制器(20)上的处理器(150)利用存储在可配置有电路(204)的存储器(208)中的语音信息来控制其操作。 每个服务控制器(20)具有与其相关联的会议电路,用于定义和创建可以访问所有入站数据并在其间提供互连的会议,并在单个出站会议频道上输出。 可以在每个服务控制器(20)上创建多个会议。 网络上的每个会议都可以通过一个相关联的会议地址进行访问,这样在给定会议的网络上只需要定义一个地址。

    Integrated multi-fabric digital cross-connect timing architecture
    13.
    发明授权
    Integrated multi-fabric digital cross-connect timing architecture 失效
    集成多结构数字交叉连接定时架构

    公开(公告)号:US5526359A

    公开(公告)日:1996-06-11

    申请号:US176125

    申请日:1993-12-30

    摘要: A timing architecture for integrating broadband, wideband, and narrowband subsystems (14-18) employs a broadband time base (100) having a first frequency, a wideband time base (102) having a second frequency, and a narrowband time base (104) having a third frequency. The broadband, wideband and narrowband time bases (100-104) are independent from one another when the integrated subsystems (14-18) are not co-located. Frequency justification is provided at the interfaces between the broadband and wideband time bases (100, 102), and between the wideband and narrowband time bases (102, 104). Phase alignment circuitry and methods are used to adjust the phases of signals wherever signal multiplexing and redundant equipment switching are provided within the time bases (100-104).

    摘要翻译: 用于集成宽带,宽带和窄带子系统(14-18)的定时架构采用具有第一频率的宽带时基(100),具有第二频率的宽带时基(102)和窄带时基(104) 具有第三频率。 当集成子系统(14-18)不在同一位置时,宽带,宽带和窄带时基(100-104)彼此独立。 在宽带和宽带时基(100,102)之间以及宽带和窄带时基(102,104)之间的接口处提供频率调整。 相位对准电路和方法用于调整在时基(100-104)内提供信号复用和冗余设备切换的信号的相位。