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公开(公告)号:US20240241761A1
公开(公告)日:2024-07-18
申请号:US18618901
申请日:2024-03-27
申请人: Intel Corporation
IPC分类号: G06F9/50 , G06F3/06 , G06F7/06 , G06F8/65 , G06F8/654 , G06F8/656 , G06F8/658 , G06F9/38 , G06F9/4401 , G06F9/455 , G06F9/48 , G06F9/54 , G06F11/07 , G06F11/30 , G06F11/34 , G06F12/02 , G06F12/06 , G06F13/16 , G06F16/174 , G06F21/57 , G06F21/62 , G06F21/73 , G06F21/76 , G06T1/20 , G06T1/60 , G06T9/00 , H01R13/453 , H01R13/631 , H03K19/173 , H03M7/30 , H03M7/40 , H03M7/42 , H04L9/08 , H04L12/28 , H04L12/46 , H04L41/044 , H04L41/0816 , H04L41/0853 , H04L41/12 , H04L43/04 , H04L43/06 , H04L43/08 , H04L43/0894 , H04L47/20 , H04L47/2441 , H04L49/104 , H04L61/5007 , H04L67/10 , H04L67/1014 , H04L67/63 , H04L67/75 , H05K7/14 , G06F11/14 , G06F15/80 , G06F16/28 , H04L9/40 , H04L41/046 , H04L41/0896 , H04L41/142 , H04L47/78 , H04Q11/00
CPC分类号: G06F9/505 , G06F3/0604 , G06F3/0608 , G06F3/0611 , G06F3/0613 , G06F3/0617 , G06F3/0641 , G06F3/0647 , G06F3/065 , G06F3/0653 , G06F3/067 , G06F7/06 , G06F8/65 , G06F8/654 , G06F8/656 , G06F8/658 , G06F9/3851 , G06F9/3891 , G06F9/4401 , G06F9/45533 , G06F9/4843 , G06F9/4881 , G06F9/5005 , G06F9/5038 , G06F9/5044 , G06F9/5083 , G06F9/544 , G06F11/0709 , G06F11/0751 , G06F11/079 , G06F11/3006 , G06F11/3034 , G06F11/3055 , G06F11/3079 , G06F11/3409 , G06F12/0284 , G06F12/0692 , G06F13/1652 , G06F16/1744 , G06F21/57 , G06F21/6218 , G06F21/73 , G06F21/76 , G06T1/20 , G06T1/60 , G06T9/005 , H01R13/453 , H01R13/4536 , H01R13/4538 , H01R13/631 , H03K19/1731 , H03M7/3084 , H03M7/40 , H03M7/42 , H03M7/60 , H03M7/6011 , H03M7/6017 , H03M7/6029 , H04L9/0822 , H04L12/2881 , H04L12/4633 , H04L41/044 , H04L41/0816 , H04L41/0853 , H04L41/12 , H04L43/04 , H04L43/06 , H04L43/08 , H04L43/0894 , H04L47/20 , H04L47/2441 , H04L49/104 , H04L61/5007 , H04L67/10 , H04L67/1014 , H04L67/63 , H04L67/75 , H05K7/1452 , H05K7/1487 , H05K7/1491 , G06F11/1453 , G06F12/023 , G06F15/80 , G06F16/285 , G06F2212/401 , G06F2212/402 , G06F2221/2107 , H04L41/046 , H04L41/0896 , H04L41/142 , H04L47/78 , H04L63/1425 , H04Q11/0005 , H05K7/1447 , H05K7/1492
摘要: Technologies for composing a managed node with multiple processors on multiple compute sleds to cooperatively execute a workload include a memory, one or more processors connected to the memory, and an accelerator. The accelerator further includes a coherence logic unit that is configured to receive a node configuration request to execute a workload. The node configuration request identifies the compute sled and a second compute sled to be included in a managed node. The coherence logic unit is further configured to modify a portion of local working data associated with the workload on the compute sled in the memory with the one or more processors of the compute sled, determine coherence data indicative of the modification made by the one or more processors of the compute sled to the local working data in the memory, and send the coherence data to the second compute sled of the managed node.
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公开(公告)号:US11977923B2
公开(公告)日:2024-05-07
申请号:US18103739
申请日:2023-01-31
申请人: Intel Corporation
IPC分类号: G06F9/50 , G06F3/06 , G06F7/06 , G06F8/65 , G06F8/654 , G06F8/656 , G06F8/658 , G06F9/38 , G06F9/4401 , G06F9/455 , G06F9/48 , G06F9/54 , G06F11/07 , G06F11/30 , G06F11/34 , G06F12/02 , G06F12/06 , G06F13/16 , G06F16/174 , G06F21/57 , G06F21/62 , G06F21/73 , G06F21/76 , G06T1/20 , G06T1/60 , G06T9/00 , H01R13/453 , H01R13/631 , H03K19/173 , H03M7/30 , H03M7/40 , H03M7/42 , H04L9/08 , H04L12/28 , H04L12/46 , H04L41/044 , H04L41/0816 , H04L41/0853 , H04L41/12 , H04L43/04 , H04L43/06 , H04L43/08 , H04L43/0894 , H04L47/20 , H04L47/2441 , H04L49/104 , H04L61/5007 , H04L67/10 , H04L67/1014 , H04L67/63 , H04L67/75 , H05K7/14 , G06F11/14 , G06F15/80 , G06F16/28 , H04L9/40 , H04L41/046 , H04L41/0896 , H04L41/142 , H04L47/78 , H04Q11/00
CPC分类号: G06F9/505 , G06F3/0604 , G06F3/0608 , G06F3/0611 , G06F3/0613 , G06F3/0617 , G06F3/0641 , G06F3/0647 , G06F3/065 , G06F3/0653 , G06F3/067 , G06F7/06 , G06F8/65 , G06F8/654 , G06F8/656 , G06F8/658 , G06F9/3851 , G06F9/3891 , G06F9/4401 , G06F9/45533 , G06F9/4843 , G06F9/4881 , G06F9/5005 , G06F9/5038 , G06F9/5044 , G06F9/5083 , G06F9/544 , G06F11/0709 , G06F11/0751 , G06F11/079 , G06F11/3006 , G06F11/3034 , G06F11/3055 , G06F11/3079 , G06F11/3409 , G06F12/0284 , G06F12/0692 , G06F13/1652 , G06F16/1744 , G06F21/57 , G06F21/6218 , G06F21/73 , G06F21/76 , G06T1/20 , G06T1/60 , G06T9/005 , H01R13/453 , H01R13/4536 , H01R13/4538 , H01R13/631 , H03K19/1731 , H03M7/3084 , H03M7/40 , H03M7/42 , H03M7/60 , H03M7/6011 , H03M7/6017 , H03M7/6029 , H04L9/0822 , H04L12/2881 , H04L12/4633 , H04L41/044 , H04L41/0816 , H04L41/0853 , H04L41/12 , H04L43/04 , H04L43/06 , H04L43/08 , H04L43/0894 , H04L47/20 , H04L47/2441 , H04L49/104 , H04L61/5007 , H04L67/10 , H04L67/1014 , H04L67/63 , H04L67/75 , H05K7/1452 , H05K7/1487 , H05K7/1491 , G06F11/1453 , G06F12/023 , G06F15/80 , G06F16/285 , G06F2212/401 , G06F2212/402 , G06F2221/2107 , H04L41/046 , H04L41/0896 , H04L41/142 , H04L47/78 , H04L63/1425 , H04Q11/0005 , H05K7/1447 , H05K7/1492
摘要: Technologies for composing a managed node with multiple processors on multiple compute sleds to cooperatively execute a workload include a memory, one or more processors connected to the memory, and an accelerator. The accelerator further includes a coherence logic unit that is configured to receive a node configuration request to execute a workload. The node configuration request identifies the compute sled and a second compute sled to be included in a managed node. The coherence logic unit is further configured to modify a portion of local working data associated with the workload on the compute sled in the memory with the one or more processors of the compute sled, determine coherence data indicative of the modification made by the one or more processors of the compute sled to the local working data in the memory, and send the coherence data to the second compute sled of the managed node.
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公开(公告)号:US20180152317A1
公开(公告)日:2018-05-31
申请号:US15721053
申请日:2017-09-29
申请人: Intel IP Corporation
发明人: Chih-Jen Chang , Brad Burres , Jose Niell , Dan Biederman , Robert Cone , Pat Wang , Kenneth Keels , Patrick Fleming
CPC分类号: G06F3/0641 , G06F3/0604 , G06F3/0608 , G06F3/0611 , G06F3/0613 , G06F3/0617 , G06F3/0647 , G06F3/065 , G06F3/0653 , G06F3/067 , G06F7/06 , G06F8/65 , G06F8/654 , G06F8/656 , G06F8/658 , G06F9/3851 , G06F9/3891 , G06F9/4401 , G06F9/4881 , G06F9/5038 , G06F9/505 , G06F9/544 , G06F11/0709 , G06F11/0751 , G06F11/079 , G06F11/1453 , G06F11/3006 , G06F11/3034 , G06F11/3055 , G06F11/3409 , G06F12/023 , G06F12/0284 , G06F12/0692 , G06F13/1652 , G06F15/80 , G06F16/1744 , G06F21/57 , G06F21/6218 , G06F21/73 , G06F21/76 , G06F2212/401 , G06F2212/402 , G06F2221/2107 , G06T1/20 , G06T1/60 , G06T9/005 , H01R13/4538 , H01R13/631 , H03K19/1731 , H03M7/3084 , H03M7/40 , H03M7/42 , H03M7/60 , H03M7/6011 , H03M7/6017 , H03M7/6029 , H04L9/0822 , H04L12/2881 , H04L12/4633 , H04L41/044 , H04L41/046 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L41/12 , H04L41/142 , H04L43/04 , H04L43/06 , H04L43/08 , H04L43/0894 , H04L47/20 , H04L47/2441 , H04L47/78 , H04L49/104 , H04L61/2007 , H04L63/1425 , H04L67/10 , H04L67/1014 , H04L67/327 , H04L67/36 , H05K7/1452 , H05K7/1487
摘要: Technologies for an accelerator interface over Ethernet are disclosed. In the illustrative embodiment, a network interface controller of a compute device may receive a data packet. If the network interface controller determines that the data packet should be pre-processed (e.g., decrypted) with a remote accelerator device, the network interface controller may encapsulate the data packet in an encapsulating network packet and send the encapsulating network packet to a remote accelerator device on a remote compute device. The remote accelerator device may pre-process the data packet (e.g., decrypt the data packet) and send it back to the network interface controller. The network interface controller may then send the pre-processed packet to a processor of the compute device.
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公开(公告)号:US20180152201A1
公开(公告)日:2018-05-31
申请号:US15719735
申请日:2017-09-29
申请人: Intel Corporation
IPC分类号: H03M7/30
CPC分类号: G06F3/0641 , G06F3/0604 , G06F3/0608 , G06F3/0611 , G06F3/0613 , G06F3/0617 , G06F3/0647 , G06F3/065 , G06F3/0653 , G06F3/067 , G06F7/06 , G06F8/65 , G06F8/654 , G06F8/656 , G06F8/658 , G06F9/3851 , G06F9/3891 , G06F9/4401 , G06F9/4881 , G06F9/5038 , G06F9/505 , G06F9/544 , G06F11/0709 , G06F11/0751 , G06F11/079 , G06F11/1453 , G06F11/3006 , G06F11/3034 , G06F11/3055 , G06F11/3409 , G06F12/023 , G06F12/0284 , G06F12/0692 , G06F13/1652 , G06F15/80 , G06F17/30153 , G06F21/57 , G06F21/6218 , G06F21/73 , G06F21/76 , G06F2212/401 , G06F2212/402 , G06F2221/2107 , G06T1/20 , G06T1/60 , G06T9/005 , H01R13/4538 , H01R13/631 , H03K19/1731 , H03M7/3084 , H03M7/40 , H03M7/42 , H03M7/60 , H03M7/6011 , H03M7/6017 , H03M7/6029 , H04L9/0822 , H04L12/2881 , H04L12/4633 , H04L41/044 , H04L41/046 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L41/12 , H04L41/142 , H04L43/04 , H04L43/06 , H04L43/08 , H04L43/0894 , H04L47/20 , H04L47/2441 , H04L49/104 , H04L61/2007 , H04L63/1425 , H04L67/10 , H04L67/1014 , H04L67/327 , H04L67/36 , H05K7/1452 , H05K7/1487
摘要: Technologies for flexibly compressing data include a computing device having an accelerator complex that is to receive a compression job request and schedule the compression job request for one or more hardware compression resources of the accelerator complex. The accelerator complex is further to perform the compression job request with the one or more hardware compression resources in response to scheduling the compression job request and to communicate uncompressed data and compressed data with an I/O subsystem of the computing device in response to performing the compression job request. Other embodiments are described and claimed.
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5.
公开(公告)号:US20180150334A1
公开(公告)日:2018-05-31
申请号:US15719770
申请日:2017-09-29
申请人: Intel Corporation
发明人: Francesc Guim Bernat , Evan Custodio , Susanne M. Balle , Joe Grecco , Henry MItchel , Rahul Khanna , Slawomir Putyrski , Sujoy Sen , Paul Dormitzer
CPC分类号: G06F3/0641 , G06F3/0604 , G06F3/0608 , G06F3/0611 , G06F3/0613 , G06F3/0617 , G06F3/0647 , G06F3/065 , G06F3/0653 , G06F3/067 , G06F7/06 , G06F8/65 , G06F8/654 , G06F8/656 , G06F8/658 , G06F9/3851 , G06F9/3891 , G06F9/4401 , G06F9/4881 , G06F9/5038 , G06F9/505 , G06F9/544 , G06F11/0709 , G06F11/0751 , G06F11/079 , G06F11/1453 , G06F11/3006 , G06F11/3034 , G06F11/3055 , G06F11/3409 , G06F12/023 , G06F12/0284 , G06F12/0692 , G06F13/1652 , G06F15/80 , G06F16/1744 , G06F21/57 , G06F21/6218 , G06F21/73 , G06F21/76 , G06F2212/401 , G06F2212/402 , G06F2221/2107 , G06T1/20 , G06T1/60 , G06T9/005 , H01R13/4538 , H01R13/631 , H03K19/1731 , H03M7/3084 , H03M7/40 , H03M7/42 , H03M7/60 , H03M7/6011 , H03M7/6017 , H03M7/6029 , H04L9/0822 , H04L12/2881 , H04L12/4633 , H04L41/044 , H04L41/046 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L41/12 , H04L41/142 , H04L43/04 , H04L43/06 , H04L43/08 , H04L43/0894 , H04L47/20 , H04L47/2441 , H04L47/78 , H04L49/104 , H04L61/2007 , H04L63/1425 , H04L67/10 , H04L67/1014 , H04L67/327 , H04L67/36 , H05K7/1452 , H05K7/1487
摘要: Technologies for providing accelerated functions as a service in a disaggregated architecture include a compute device that is to receive a request for an accelerated task. The task is associated with a kernel usable by an accelerator sled communicatively coupled to the compute device to execute the task. The compute device is further to determine, in response to the request and with a database indicative of kernels and associated accelerator sleds, an accelerator sled that includes an accelerator device configured with the kernel associated with the request. Additionally, the compute device is to assign the task to the determined accelerator sled for execution. Other embodiments are also described and claimed
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6.
公开(公告)号:US20180150298A1
公开(公告)日:2018-05-31
申请号:US15721821
申请日:2017-09-30
申请人: Intel Corporation
发明人: Susanne M. Balle , Francesc Guim Bernat , Slawomir Putyrski , Joe Grecco , Henry MItchel , Rahul Khanna , Evan Custodio
CPC分类号: G06F3/0641 , G06F3/0604 , G06F3/0608 , G06F3/0611 , G06F3/0613 , G06F3/0617 , G06F3/0647 , G06F3/065 , G06F3/0653 , G06F3/067 , G06F7/06 , G06F8/65 , G06F8/654 , G06F8/656 , G06F8/658 , G06F9/3851 , G06F9/3891 , G06F9/4401 , G06F9/4881 , G06F9/5038 , G06F9/505 , G06F9/544 , G06F11/0709 , G06F11/0751 , G06F11/079 , G06F11/1453 , G06F11/3006 , G06F11/3034 , G06F11/3055 , G06F11/3409 , G06F12/023 , G06F12/0284 , G06F12/0692 , G06F13/1652 , G06F15/80 , G06F16/1744 , G06F21/57 , G06F21/6218 , G06F21/73 , G06F21/76 , G06F2212/401 , G06F2212/402 , G06F2221/2107 , G06T1/20 , G06T1/60 , G06T9/005 , H01R13/4538 , H01R13/631 , H03K19/1731 , H03M7/3084 , H03M7/40 , H03M7/42 , H03M7/60 , H03M7/6011 , H03M7/6017 , H03M7/6029 , H04L9/0822 , H04L12/2881 , H04L12/4633 , H04L41/044 , H04L41/046 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L41/12 , H04L41/142 , H04L43/04 , H04L43/06 , H04L43/08 , H04L43/0894 , H04L47/20 , H04L47/2441 , H04L47/78 , H04L49/104 , H04L61/2007 , H04L63/1425 , H04L67/10 , H04L67/1014 , H04L67/327 , H04L67/36 , H05K7/1452 , H05K7/1487
摘要: Technologies for offloading acceleration task scheduling operations to accelerator sleds include a compute device to receive a request from a compute sled to accelerate the execution of a job, which includes a set of tasks. The compute device is also to analyze the request to generate metadata indicative of the tasks within the job, a type of acceleration associated with each task, and a data dependency between the tasks. Additionally the compute device is to send an availability request, including the metadata, to one or more micro-orchestrators of one or more accelerator sleds communicatively coupled to the compute device. The compute device is further to receive availability data from the one or more micro-orchestrators, indicative of which of the tasks the micro-orchestrator has accepted for acceleration on the associated accelerator sled. Additionally, the compute device is to assign the tasks to the one or more micro-orchestrators as a function of the availability data.
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公开(公告)号:US20180150240A1
公开(公告)日:2018-05-31
申请号:US15720236
申请日:2017-09-29
申请人: Intel Corporation
IPC分类号: G06F3/06
CPC分类号: G06F3/0641 , G06F3/0604 , G06F3/0608 , G06F3/0611 , G06F3/0613 , G06F3/0617 , G06F3/0647 , G06F3/065 , G06F3/0653 , G06F3/067 , G06F7/06 , G06F8/65 , G06F8/654 , G06F8/656 , G06F8/658 , G06F9/3851 , G06F9/3891 , G06F9/4401 , G06F9/4881 , G06F9/5038 , G06F9/505 , G06F9/544 , G06F11/0709 , G06F11/0751 , G06F11/079 , G06F11/1453 , G06F11/3006 , G06F11/3034 , G06F11/3055 , G06F11/3409 , G06F12/023 , G06F12/0284 , G06F12/0692 , G06F13/1652 , G06F15/80 , G06F16/1744 , G06F21/57 , G06F21/6218 , G06F21/73 , G06F21/76 , G06F2212/401 , G06F2212/402 , G06F2221/2107 , G06T1/20 , G06T1/60 , G06T9/005 , H01R13/4538 , H01R13/631 , H03K19/1731 , H03M7/3084 , H03M7/40 , H03M7/42 , H03M7/60 , H03M7/6011 , H03M7/6017 , H03M7/6029 , H04L9/0822 , H04L12/2881 , H04L12/4633 , H04L41/044 , H04L41/046 , H04L41/0816 , H04L41/0853 , H04L41/0896 , H04L41/12 , H04L41/142 , H04L43/04 , H04L43/06 , H04L43/08 , H04L43/0894 , H04L47/20 , H04L47/2441 , H04L47/78 , H04L49/104 , H04L61/2007 , H04L63/1425 , H04L67/10 , H04L67/1014 , H04L67/327 , H04L67/36 , H05K7/1452 , H05K7/1487
摘要: Technologies for offloading I/O intensive workload phases to a data storage sled include a compute sled. The compute sled is to execute a workload that includes multiple phases. Each phase is indicative of a different resource utilization over a time period. Additionally, the compute sled is to identify an I/O intensive phase of the workload, wherein the amount of data to be communicated through a network path between the compute sled and the data storage sled to execute the I/O intensive phase satisfies a predefined threshold. The compute sled is also to migrate the workload to the data storage sled to execute the I/O intensive phase locally on the data storage sled. Other embodiments as also described and claimed.
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公开(公告)号:US07684334B2
公开(公告)日:2010-03-23
申请号:US10195599
申请日:2002-06-26
CPC分类号: H04L49/104 , H04L12/5601 , H04L49/255 , H04L2012/562 , H04L2012/5621 , H04L2012/5632 , H04Q11/0478
摘要: In a method of processing a call in response to a connection request that includes reported bandwidths in both upstream and downstream directions, a communication node on the calling side (1) manages available bandwidths in upstream and downstream directions on a per-path basis; (2) searches for a path having upstream/downstream available bandwidths, which are greater than the upstream/downstream reported bandwidths; (3) if such a path can be found, accepts the call connection request as a call communicated in both directions on this path; (4) if such a path cannot be found, searches independently for a path having an available bandwidth greater than the upstream reported bandwidth and a path having an available bandwidth greater than the downstream reported bandwidth; and (5) if these two paths can be found, accepts the call connection request as a call communicated on the separate paths on a per-upstream- and downstream-direction basis.
摘要翻译: 在响应于包括在上游和下游方向上报告的带宽的连接请求处理呼叫的方法中,主叫侧的通信节点(1)在每个路径的基础上管理上游和下游方向上的可用带宽; (2)搜索具有大于上下游报告带宽的上游/下游可用带宽的路径; (3)如果可以找到这样的路径,则接受呼叫连接请求作为在该路径上的双向通信的呼叫; (4)如果不能找到这样的路径,则独立地搜索具有大于上行报告带宽的可用带宽的路径和具有大于下行报告带宽的可用带宽的路径; (5)如果找到这两条路径,则可以将呼叫连接请求作为在每个上游和下游方向的单独路径上传送的呼叫。
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公开(公告)号:US07352699B2
公开(公告)日:2008-04-01
申请号:US10740720
申请日:2003-12-18
申请人: Nelson Willhite , Mike Noll , Robert Steven Martin , Akhil Duggal , Craig Lindberg , Thomas Carleton Jones , Srinivas Komidi
发明人: Nelson Willhite , Mike Noll , Robert Steven Martin , Akhil Duggal , Craig Lindberg , Thomas Carleton Jones , Srinivas Komidi
IPC分类号: G08C15/00
CPC分类号: H04L49/30 , H04L12/5601 , H04L47/18 , H04L47/26 , H04L47/30 , H04L47/50 , H04L47/621 , H04L49/104 , H04L49/153 , H04L49/50 , H04L2012/5627
摘要: A technique for providing access to a switch fabric is disclosed. In some embodiments, the method comprises determining scheduling information specific to a link to the switch fabric and using the scheduling information to determine a queue to be serviced by the link. In some embodiments, the system comprises a buffer configured to store a plurality of queues, and a queue scheduler associated with the buffer and configured to determine scheduling information specific to a link to the switch fabric and use the scheduling information to select one of the plurality of queues as the next queue to be serviced by the link.
摘要翻译: 公开了一种用于提供对交换结构的访问的技术。 在一些实施例中,该方法包括确定特定于到交换结构的链路的调度信息,并使用调度信息来确定要被该链路服务的队列。 在一些实施例中,系统包括被配置为存储多个队列的缓冲器和与缓冲器相关联的队列调度器,并且被配置为确定特定于交换结构的链路的调度信息,并使用调度信息来选择多个队列中的一个 的队列作为链接服务的下一个队列。
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公开(公告)号:US07194078B2
公开(公告)日:2007-03-20
申请号:US09086294
申请日:1998-05-28
申请人: Peggy M. Stumer
发明人: Peggy M. Stumer
CPC分类号: H04L49/104 , H04L2012/5626 , H04L2012/563 , H04M3/54 , H04Q3/66 , H04Q11/0442 , H04Q11/0478 , H04Q2213/1305 , H04Q2213/13054 , H04Q2213/13103 , H04Q2213/1315 , H04Q2213/13152 , H04Q2213/13175 , H04Q2213/13176 , H04Q2213/1328 , H04Q2213/13282 , H04Q2213/1332
摘要: A system and apparatus within a communications server for intercepting supplemental service requests to a communications network and ensuring redirection to correct network party and optimal resource usage when redirecting a call over the network. The optimization system includes a database and database server software. A device/trunk handler is used to interface signalling channels to the optimization system. A monitoring and statistics unit monitors the signalling channels. The server software is responsive to the monitoring and statistics unit and selects the routing of the supplementary service through the appropriate server(s) in the network.
摘要翻译: 通信服务器内的系统和装置,用于在通过网络重定向呼叫时拦截对通信网络的补充服务请求并确保重定向到正确的网络方和最佳资源使用。 优化系统包括数据库和数据库服务器软件。 设备/中继处理器用于将信令信道接入优化系统。 监控和统计单元监控信令通道。 服务器软件响应于监控和统计单元,并通过网络中的相应服务器选择补充服务的路由。
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