Input buffer for high-voltage signal application
    11.
    发明申请
    Input buffer for high-voltage signal application 审中-公开
    用于高压信号应用的输入缓冲器

    公开(公告)号:US20090134919A1

    公开(公告)日:2009-05-28

    申请号:US11987031

    申请日:2007-11-27

    IPC分类号: H03K3/00

    CPC分类号: H03K3/356165

    摘要: An input buffer for a high-voltage signal application is provided. The input buffer uses a clamper and an inverter to clamp the output voltage in a proper range even if the input voltage is too high or too low. The proper range of the output voltage is controlled by a voltage source and the ground, so that an electrical device can be triggered safely by the output voltage.

    摘要翻译: 提供了用于高电压信号应用的输入缓冲器。 即使输入电压过高或过低,输入缓冲器也会使用钳位器和逆变器将输出电压钳位在适当的范围内。 输出电压的适当范围由电压源和接地控制,使得电气设备可以被输出电压安全地触发。

    Injection locked frequency divider
    12.
    发明申请
    Injection locked frequency divider 失效
    注射锁定分频器

    公开(公告)号:US20080197894A1

    公开(公告)日:2008-08-21

    申请号:US11892194

    申请日:2007-08-21

    IPC分类号: H03B19/06

    摘要: An injection locked frequency divider includes a signal injection unit, a Hartley voltage controlled oscillator and a biasing unit. The signal injection unit and the biasing unit output an injection signal to the Hartley voltage controlled oscillator to bias the Hartley voltage controlled oscillator. The Hartley voltage controlled oscillator, which includes a first transistor, a second transistor and a LC tank, receives the injection signal and outputs a differential output signal through a first output terminal and a second output terminal. First terminals of the first and second transistors are respectively coupled to the first and second output terminals, and second terminals of the first and second transistors are coupled to a first node. The LC tank decides a resonant frequency of the Hartley voltage controlled oscillator and serves as a positive feedback circuit for the first and second transistors.

    摘要翻译: 注入锁定分频器包括信号注入单元,Hartley压控振荡器和偏置单元。 信号注入单元和偏置单元向Hartley压控振荡器输出注入信号以偏置Hartley压控振荡器。 包括第一晶体管,第二晶体管和LC箱的Hartley压控振荡器接收注入信号,并通过第一输出端和第二输出端输出差分输出信号。 第一和第二晶体管的第一端分别耦合到第一和第二输出端,第一和第二晶体管的第二端耦合到第一节点。 LC箱决定了Hartley压控振荡器的谐振频率,并用作第一和第二晶体管的正反馈电路。

    MULTI-PHASE VOLTAGE-CONTROL OSCILLATOR
    13.
    发明申请
    MULTI-PHASE VOLTAGE-CONTROL OSCILLATOR 失效
    多相电压控制振荡器

    公开(公告)号:US20080106343A1

    公开(公告)日:2008-05-08

    申请号:US11616899

    申请日:2006-12-28

    IPC分类号: H03B27/00

    摘要: A multi-phase voltage-control oscillator including a first voltage-control oscillator circuit and a second voltage-control oscillator circuit is provided. The first voltage-control oscillator circuit includes a first LC tank and a first inductor assembly unit. The second voltage-control oscillator circuit includes a second LC tank and a second inductor assembly unit. A mutual inductance effect is generated between the inductors of the first voltage-control oscillator and the inductors of the second voltage-control oscillator.

    摘要翻译: 提供了包括第一压控振荡器电路和第二压控振荡器电路的多相电压控制振荡器。 第一压控振荡器电路包括第一LC槽和第一电感器组件单元。 第二压控振荡器电路包括第二LC槽和第二电感器组件单元。 在第一压控振荡器的电感器和第二压控振荡器的电感器之间产生互感效应。

    Injection-locked frequency divider
    14.
    发明申请
    Injection-locked frequency divider 有权
    注入锁分频器

    公开(公告)号:US20090033430A1

    公开(公告)日:2009-02-05

    申请号:US11984696

    申请日:2007-11-21

    IPC分类号: H03K3/03

    CPC分类号: H03K3/0322 H03B19/14

    摘要: An injection-locked frequency divider includes a ring oscillator, a signal injection circuit, a first adjustable load circuit and a second adjustable load circuit. The ring oscillator generates an oscillation signal according to a differential signal outputted by the signal injection circuit. According to an adjustable voltage, the first and second adjustable load circuits can respectively change equivalent impedances of the first adjustable load circuit and the second adjustable load circuit so that a free-running frequency of the oscillation signal of the ring oscillator is adjusted and an injection-locked frequency range of the injection-locked frequency divider is expanded.

    摘要翻译: 注入锁定分频器包括环形振荡器,信号注入电路,第一可调负载电路和第二可调负载电路。 环形振荡器根据由信号注入电路输出的差分信号产生振荡信号。 根据可调电压,第一和第二可调负载电路可以分别改变第一可调负载电路和第二可调负载电路的等效阻抗,从而调节环形振荡器的振荡信号的自由运行频率,并且注入 锁定分频器的锁定频率范围扩大。

    INJECTION-LOCKED FREQUENCY DIVIDER
    15.
    发明申请
    INJECTION-LOCKED FREQUENCY DIVIDER 失效
    注射锁频分路器

    公开(公告)号:US20080074199A1

    公开(公告)日:2008-03-27

    申请号:US11561417

    申请日:2006-11-19

    IPC分类号: H03L7/00

    摘要: An injection-locked frequency divider is provided. The injection-locked frequency divider includes a variable reactance unit, a signal injection unit, a first switch, a second switch, a first transformer, and a second transformer. The variable reactance unit, the first switch, the second switch, the first transformer, and the second transformer form a transformer-based LC-tank oscillator. The signal injection unit receives an injection signal. When the injection-locked frequency divider is in a locked state, the transformer-based LC-tank oscillator outputs a frequency division signal. Employing the feedback action of the first transformer and the second transformer, the present invention not only has a wide locking range but also promotes the realization of the low operating voltage.

    摘要翻译: 提供了一种注入锁定分频器。 注入锁定分频器包括可变电抗单元,信号注入单元,第一开关,第二开关,第一变压器和第二变压器。 可变电抗单元,第一开关,第二开关,第一变压器和第二变压器形成基于变压器的LC槽振荡器。 信号注入单元接收注入信号。 当注入锁定分频器处于锁定状态时,基于变压器的LC振荡振荡器输出分频信号。 采用第一变压器和第二变压器的反馈动作,本发明不仅具有宽锁定范围,而且促进了低工作电压的实现。

    Frequency synthesizer with built-in carrier and crystal oscillation frequency offset cancellation
    16.
    发明授权
    Frequency synthesizer with built-in carrier and crystal oscillation frequency offset cancellation 有权
    频率合成器内置载波和晶体振荡频偏补偿

    公开(公告)号:US08279014B2

    公开(公告)日:2012-10-02

    申请号:US12986372

    申请日:2011-01-07

    IPC分类号: H03L7/08 H04B15/00

    CPC分类号: H03L7/1976

    摘要: A frequency synthesizer of a transceiver for generating a crystal oscillation frequency and a carry frequency having been done a process of frequency offset cancellation with that of another transceiver. The frequency offset cancellation of the frequency synthesizer is done in accordance with a wireless signal which is transmitted from another transceiver received. The frequency synthesizer has a first sigma-delta modulator receiving a signal transmitted by a transceiver at far area responding thereafter a frequency divisor value in accordance with the channel information of the received signal and a frequency offset between two.

    摘要翻译: 一种用于产生晶体振荡频率和进位频率的收发器的频率合成器,该频率合成器已经进行了与另一个收发器的频率偏移消除的处理。 频率合成器的频率偏移消除是根据从另一收发信机发送的无线信号完成的。 频率合成器具有第一Σ-Δ调制器,接收由远端的收发信机发送的信号,然后根据接收信号的信道信息和两者之间的频率偏移响应频率除数值。

    Frequency Synthesizer with Built-in Carrier and Crystal Oscillation Frequency Offset Cancellation
    17.
    发明申请
    Frequency Synthesizer with Built-in Carrier and Crystal Oscillation Frequency Offset Cancellation 有权
    具有内置载波和晶体振荡频率偏移消除的频率合成器

    公开(公告)号:US20120176202A1

    公开(公告)日:2012-07-12

    申请号:US12986372

    申请日:2011-01-07

    IPC分类号: H03L7/00

    CPC分类号: H03L7/1976

    摘要: A frequency synthesizer of a transceiver for generating a crystal oscillation frequency and a carry frequency having been done a process of frequency offset cancellation with that of another transceiver. The frequency offset cancellation of the frequency synthesizer is done in accordance with a wireless signal which is transmitted from another transceiver received. The frequency synthesizer has a first sigma-delta modulator receiving a signal transmitted by a transceiver at far area responding thereafter a frequency divisor value in accordance with the channel information of the received signal and a frequency offset between two.

    摘要翻译: 一种用于产生晶体振荡频率和进位频率的收发器的频率合成器,该频率合成器已经进行了与另一个收发器的频率偏移消除的处理。 频率合成器的频率偏移消除是根据从另一收发信机发送的无线信号完成的。 频率合成器具有第一Σ-Δ调制器,接收由远端的收发信机发送的信号,然后根据接收信号的信道信息和两者之间的频率偏移响应频率除数值。

    Low power consumption frequency divider circuit
    18.
    发明授权
    Low power consumption frequency divider circuit 失效
    低功耗分频电路

    公开(公告)号:US07446617B2

    公开(公告)日:2008-11-04

    申请号:US11606071

    申请日:2006-11-30

    IPC分类号: H03B5/12 H03L7/24

    摘要: The present invention discloses a low power consumption frequency divider circuit. It mainly comprises a signal source; a signal injection circuit; and an oscillator circuit. The low-power consumption frequency divider circuit according to the present invention mainly uses the configuration of current reused circuit to form the common current path for reducing the power loss in the disclosed frequency divider circuit.

    摘要翻译: 本发明公开了一种低功耗分频电路。 它主要包括信号源; 信号注入电路; 和振荡电路。 根据本发明的低功耗分频器电路主要使用电流重用电路的配置来形成用于降低所公开的分频器电路中的功率损耗的公共电流路径。