System and a method for generating an interleaved output during a decoding of a data block
    12.
    发明授权
    System and a method for generating an interleaved output during a decoding of a data block 失效
    系统和在数据块的解码期间产生交错输出的方法

    公开(公告)号:US07760114B2

    公开(公告)日:2010-07-20

    申请号:US12261606

    申请日:2008-10-30

    CPC classification number: H04L9/0631

    Abstract: A method for generating an interleaved output during a decoding of a data block, the method includes: (i) selecting, in response to a row indicator, a row register and a multiplication factor to provide a selected row register and a selected multiplication factor; wherein the selected multiplication factor is responsive to a size of the data block; (ii) multiplying a value stored in the selected row register by the selected multiplication factor to provide an intermediate result; (iii) performing a modulo P operation on the intermediate result to provide a permutated result; wherein the permutated result and the value stored in the selected row register are adjacent elements of the same permutation; wherein P is responsive to a size of the data block; (iv) writing the permutated result to the selected row register; and (v) outputting a data block element that is selected in response to the permutated result.

    Abstract translation: 一种用于在数据块的解码期间产生交错输出的方法,所述方法包括:(i)响应于行指示符,选择行寄存器和乘法因子以提供所选择的行寄存器和选择的乘法因子; 其中所选择的乘法因子响应于所述数据块的大小; (ii)将存储在所选择的行寄存器中的值乘以所选乘法因子以提供中间结果; (iii)对中间结果执行模P运算以提供置换结果; 其中所述排列结果和存储在所选择的行寄存器中的值是相同排列的相邻元素; 其中P响应于所述数据块的大小; (iv)将排列的结果写入所选择的行寄存器; 和(v)输出响应于所述置换结果选择的数据块元素。

    DEVICE HAVING TURBO DECODING CAPABILITIES AND A METHOD FOR TURBO DECODING
    13.
    发明申请
    DEVICE HAVING TURBO DECODING CAPABILITIES AND A METHOD FOR TURBO DECODING 有权
    具有涡轮解码能力的装置和用于涡轮解码的方法

    公开(公告)号:US20090327834A1

    公开(公告)日:2009-12-31

    申请号:US12163638

    申请日:2008-06-27

    CPC classification number: H03M13/2957 H03M13/3905

    Abstract: A device and a method for turbo decoding, the method includes performing multiple iterations of a turbo decoding process until a turbo decoding process is completed; wherein the performing comprises repeating the stages of: (i) initializing at least one state metric of multiple windows of a channel data block for a current iteration of the turbo decoding process by at least one corresponding state metric that was calculated during a previous iteration of the turbo decoding process; and (ii) calculating in parallel, at least forward state metrics and backward state metrics of the multiple windows, during the current iteration.

    Abstract translation: 一种用于turbo解码的设备和方法,所述方法包括执行turbo解码过程的多次迭代,直到turbo解码过程完成; 其中所述执行包括重复以下阶段:(i)通过在先前迭代中计算的至少一个对应状态度量来初始化turbo解码过程的当前迭代的信道数据块的多个窗口的至少一个状态度量 turbo解码过程; 以及(ii)在当前迭代期间并行地计算多个窗口的至少前向状态度量和向后状态度量。

    Method and apparatus for interleaving a data stream using quadrature permutation polynomial functions (QPP)
    15.
    发明授权
    Method and apparatus for interleaving a data stream using quadrature permutation polynomial functions (QPP) 有权
    使用正交置换多项式函数(QPP)来交织数据流的方法和装置

    公开(公告)号:US08595584B2

    公开(公告)日:2013-11-26

    申请号:US12990865

    申请日:2008-05-19

    CPC classification number: H03M13/2771 H03M13/2739 H03M13/2957 H03M13/6525

    Abstract: A semiconductor device comprising processing logic. The processing logic is arranged to configure interleaver logic to re-order data symbols of a data stream according to a quadrature permutation polynomial function. The processing logic is further arranged to: divide a cyclic group of values defined by the QPP function into a set of subgroups, the set of subgroups being capable of being defined by a set of linear functions; derive inverse functions for the set of linear functions defining the subgroups; and configure the interleaver logic to load the data symbols of the data stream into a buffer at locations within the buffer corresponding to a cyclic group of values representative of the inverse function for the QPP function based on the inverse functions of the set of linear functions defining the subgroups.

    Abstract translation: 一种包括处理逻辑的半导体器件。 处理逻辑被配置为配置交织器逻辑以根据正交置换多项式函数重新排序数据流的数据符号。 所述处理逻辑还被配置为:将由所述QPP功能定义的循环组划分成一组子组,所述一组子组能够由一组线性函数定义; 导出定义子组的一组线性函数的反函数; 并且配置交织器逻辑,以基于定义的线性函数集合的反函数将数据流的数据符号加载到缓冲器中,该缓冲器位于对应于表示QPP函数的反函数的循环数组的缓冲器内的位置 子组。

    DEVICE AND METHOD FOR TURBO-ENCODING A BLOCK OF DATA
    16.
    发明申请
    DEVICE AND METHOD FOR TURBO-ENCODING A BLOCK OF DATA 有权
    用于涡轮编码数据块的装置和方法

    公开(公告)号:US20120151295A1

    公开(公告)日:2012-06-14

    申请号:US13391296

    申请日:2009-08-31

    CPC classification number: H03M13/2996 H03M13/2903 H03M13/6544

    Abstract: A method for turbo-encoding a block of data including: receiving data bits of the block of data; masking irrelevant data bits by a masking unit, wherein irrelevant data bits are data bits that regardless of their value do not affect a final state of an interleaved convolutional encoder of a turbo encoder; calculating a last state of the interleaved convolutional encoder based on relevant data bits provided by the masking unit; wherein the calculating of the last state of the interleaved convolutional encoder is initialized before receiving the entire block of data; finding an initial state of the interleaved convolutional encoder based on the last state of the interleaved convolutional encoder; wherein the initial state of the interleaved convolutional encoder equals a final state of the interleaved convolutional encoder; initializing the interleaved convolutional encoder to the initial state; and turbo-encoding the interleaved data bits by the interleaved convolutional encoder.

    Abstract translation: 一种用于对数据块进行turbo编码的方法,包括:接收数据块的数据位; 通过掩蔽单元掩蔽不相关的数据比特,其中不相关的数据比特是数据比特,不管它们的值不影响turbo编码器的交错卷积编码器的最终状态; 基于由所述掩蔽单元提供的相关数据比特来计算交错卷积编码器的最后状态; 其中在接收整个数据块之前初始化交织卷积编码器的最后状态的计算; 基于交错卷积编码器的最后状态,找到交错卷积编码器的初始状态; 其中交错卷积编码器的初始状态等于交错卷积编码器的最终状态; 将交错卷积编码器初始化为初始状态; 并且通过交错卷积编码器对交织的数据比特进行turbo编码。

    ENCODING MODULE, APPARATUS AND METHOD FOR DETERMINING A POSITION OF A DATA BIT WITHIN AN INTERLEAVED DATA STREAM
    17.
    发明申请
    ENCODING MODULE, APPARATUS AND METHOD FOR DETERMINING A POSITION OF A DATA BIT WITHIN AN INTERLEAVED DATA STREAM 有权
    编码模块,装置和方法,用于确定数据位在独立数据流中的位置

    公开(公告)号:US20120147988A1

    公开(公告)日:2012-06-14

    申请号:US13389205

    申请日:2009-08-31

    CPC classification number: H03M13/271 H03M13/2957 H03M13/635 H03M13/6544

    Abstract: An encoding module comprises an inverse interleaving module arranged to: determine an initial location index within an interleaving matrix for a data bit; and perform bit reverse ordering (BRO) on a column index value for the initial location index for the data bit to obtain a BRO column index value for the data bit. The inverse interleaving module is further arranged to calculate a number of valid interleaving matrix addresses preceding a location index for the data bit following bit reverse ordering; and determine a position of the data bit within the interleaved data stream based on the calculated number of valid addresses.

    Abstract translation: 编码模块包括逆交错模块,其被布置为:确定用于数据比特的交织矩阵内的初始位置索引; 并对数据位的初始位置索引的列索引值执行位反向排序(BRO),以获得数据位的BRO列索引值。 逆交错模块还被布置为计算在位反向排序之后的数据位的位置索引之前的有效交织矩阵地址的数量; 并且基于计算出的有效地址的数量来确定交错数据流内的数据位的位置。

    Replication facility
    19.
    发明授权
    Replication facility 失效
    复制设施

    公开(公告)号:US5588147A

    公开(公告)日:1996-12-24

    申请号:US181704

    申请日:1994-01-14

    CPC classification number: G06F17/30212 Y10S707/99931

    Abstract: A replication facility provides for the replication of files or portions of files in a distributed environment. The replication facility is able to replicate any subtree within a distributed namespace of the distributed environment. The replication facility provides multi-mastered, weakly consistent replication. The replication facility supports both public replication and private replication.

    Abstract translation: 复制工具提供在分布式环境中复制文件或部分文件。 复制工具能够复制分布式环境的分布式命名空间中的任何子树。 复制工具提供多重掌握,弱度一致的复制。 复制设施支持公共复制和私有复制。

    Contention free parallel access system and a method for contention free parallel access to a group of memory banks
    20.
    发明授权
    Contention free parallel access system and a method for contention free parallel access to a group of memory banks 有权
    无争用的并行访问系统和一种无争用并行访问一组存储体的方法

    公开(公告)号:US08627022B2

    公开(公告)日:2014-01-07

    申请号:US12812032

    申请日:2008-01-21

    Abstract: A parallel access system including: a group of processing entities that comprises N processing entities; wherein N is a positive integer that exceeds one; a group of memory banks that stores K information elements; wherein the group of memory banks comprises N pairs of single access memory banks; each pair of memory banks comprises an even memory bank and an odd memory bank; wherein each pair of memory banks stores sub-set of K/N information elements; wherein an even memory bank of each pair of memory banks stores even address information elements of a certain sub-set of K/N information elements and an odd memory bank of each pair of memory banks stores odd address information elements of the certain sub-set of K/N information elements; wherein K/N is an even positive integer; and a non-blocking interconnect, coupled to the group of processing entities and to the group of memory banks; wherein during each fetch cycle each processing entity of the group of processing entities fetches a first information element from an odd memory unit of a pair of memory banks and fetches a second information element from an even memory unit of the pair of memory banks; wherein the first and second information elements are two consecutive interleaved address information elements.

    Abstract translation: 一种并行接入系统,包括:一组包含N个处理实体的处理实体; 其中N是超过1的正整数; 一组存储K个信息元素的记忆库; 其中所述存储体组包括N对单个存取存储体; 每对存储体组包括偶数存储体和奇数存储体; 其中每对存储器组存储K / N个信息元素的子集; 其中每对存储器组的偶数存储体存储K / N个信息元素的某个子集的偶数地址信息元素,并且每对存储器组的奇数存储体组存储该特定子集的奇数地址信息元素 的K / N信息要素; 其中K / N是偶数正整数; 以及耦合到所述一组处理实体和所述存储体组的非阻塞互连; 其中在每个读取周期期间,所述处理实体组中的每个处理实体从一对存储器组的奇数存储器单元中提取第一信息元素,并从所述一对存储器组的偶数存储器单元中提取第二信息元素; 其中所述第一和第二信息元素是两个连续的交错地址信息元素。

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