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11.
公开(公告)号:US20240354577A1
公开(公告)日:2024-10-24
申请号:US18374669
申请日:2023-09-29
Applicant: ZHEJIANG LAB
Inventor: Yong LI , Laiping ZHAO , Zezheng MAO , Wen CHENG , Guang CHEN , Lingfang ZENG
IPC: G06N3/084
CPC classification number: G06N3/084
Abstract: A method, a system, a device, and a storage medium for operation resource placement of deep learning are provided. The method includes: acquiring training operations to be placed and corresponding priorities; based on an order of the priorities, selecting a network structure for operation placement according to required resource amount of the training operations in sequence; the network structure including a server, a top of rack, a container group set denoted as Podset and a trunk layer switch; based on the selected network structure, taking a transmission amount of network data in a training process as an optimization target to perform minimization optimization, and obtaining a corresponding operation placement scheme.
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公开(公告)号:US12119108B2
公开(公告)日:2024-10-15
申请号:US18363701
申请日:2023-08-01
Applicant: ZHEJIANG LAB
Inventor: Jingsong Li , Wenchao Xiang , Guangyuan Deng , Tianshu Zhou , Yu Tian
CPC classification number: G16H40/20 , G06F9/4881 , G06F16/254 , G16H10/60
Abstract: The present disclosure discloses a medical ETL task dispatching method, system and apparatus based on multiple centers. The method includes following steps: step S1: testing and verifying ETL tasks; step S2: deploying the ETL tasks to a hospital center, and dispatching the ETL tasks to a plurality of executors for execution; step S3: screening an executor set meeting resource demands of ETL tasks to be dispatched; step S4: calculating a current task load of each executor in the executor set; step S5: selecting the executor with a minimum current task load to execute the ETL tasks; and step S6: selecting, by the dispatching machine, the ETL tasks from executor active queues according to a priority for execution. The present disclosure selects the most suitable executor by analyzing a serving index as a task to be dispatched on a current dispatching machine.
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13.
公开(公告)号:US12118832B1
公开(公告)日:2024-10-15
申请号:US18492767
申请日:2023-10-23
Applicant: ZHEJIANG LAB
Inventor: Hongyang Chen , Chenxi Liu , Zhu Xiao
IPC: G07C5/02
CPC classification number: G07C5/02
Abstract: The present application discloses a method and a system for analyzing and predicting a vehicle stay behavior based on multi-task learning, and the method includes the following steps: acquiring vehicle GPS and OBD data including a vehicle ID, a travel start time, a start longitude, a start latitude, an end time, an end longitude, and an end latitude after desensitization; preprocessing vehicle GPS and OBD data to obtain vehicle stay behavior data including stay location and stay duration; extract a spatial-temporal characteristic of the preprocessed vehicle stay behavior data by a deep recurrent neural network; inputting the spatial-temporal characteristic into a multi-task learning and predicting network, and obtaining the correlation between a stay location prediction task and the stay duration prediction task based on the historical stay behavior of the vehicle through the multi-task learning and predicting network to predict the stay location and stay duration.
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公开(公告)号:US12117829B1
公开(公告)日:2024-10-15
申请号:US18505068
申请日:2023-11-08
Applicant: ZHEJIANG LAB
Inventor: Yuntao Liu , Yongdong Zhu , Zhifeng Zhao , Wei Hua , Qian Huang , Shuyuan Zhao , Daoxun Li , Zimian Wu
CPC classification number: G05D1/0022 , B60W60/00 , H04L67/12 , B60W2556/45
Abstract: The present disclosure discloses an autonomous vehicle remote control apparatus and a method based on heterogeneous networks. The apparatus comprises a vehicle information acquisition module, a first message sending module, a first message receiving module and a first remote control module. According to the present disclosure, the possibility of failure of remote control is avoided or greatly reduced by bypassing the area where the network quality does not support remote control when planning a vehicle path, heterogeneous network resources are reasonably utilized on the vehicle driving path, the real-time performance of obtaining vehicle-related information by a remote control terminal is improved, and the availability and reliability of remote control and the safety of vehicle driving are effectively enhanced.
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15.
公开(公告)号:US20240334841A1
公开(公告)日:2024-10-03
申请号:US18375509
申请日:2023-09-30
Applicant: ZHEJIANG LAB
Inventor: LIHUI YANG , XIAOHANG ZHANG , CHAO ZHANG , RAN DUAN , ZHIFENG ZHAO , DI LI , SHILING YU , YI FENG
CPC classification number: H10N60/0241 , C23C14/0641 , C23C14/35 , G01J5/20 , G01J2005/208
Abstract: The present invention discloses the low-stress niobium nitride (NbN) superconducting thin film and preparation method and application thereof. The preparation method includes the following steps: providing the metal Nb target and the Si-based substrates, fixing the Si-based substrate at room temperature, adjusting the mass flow ratio of N2/Ar to 20%-50%, the sputtering power to 50-400 W and the deposition pressure to 3.0-10.0 mTorr, NbN superconducting thin films with a stress range of-500 MPa˜500 MPa and a thickness of 70-150 nm were deposited on Si-based substrates. By synergistically controlling the mass flow rate ratio of N2/Ar, sputtering power, and deposition pressure, low stress NbN superconducting thin films can be easily and efficiently prepared. The stress range of the prepared NbN superconducting thin films meets the preparation requirements of superconducting dynamic inductance detectors, and can be mass-produced.
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16.
公开(公告)号:US20240331425A1
公开(公告)日:2024-10-03
申请号:US18460680
申请日:2023-09-04
Applicant: ZHEJIANG LAB
Inventor: Yao QI , Hongyang CHEN , Jingsong LV , Wentao YANG
CPC classification number: G06V30/19187 , G06N5/02 , G06V30/19173
Abstract: A method, a device, computer equipment and a storage medium for identify an illegal commodity. The method comprises: firstly, constructing a multi-modal knowledge graph according to a multi-modal knowledge graph data set, and extracting visual features of all visual modality entities and text features of all text modality entities in the knowledge graph; then obtaining a commodity image and a commodity text according to a database; then, generating commodity visual feature according to the commodity image; then generating the commodity text feature according to the commodity text; secondly, according to the visual features and text features, as well as the commodity visual feature and the commodity text feature, linking the commodity image and the commodity text to the knowledge graph by using an entity linking method; finally, obtaining the correlation between the commodity image and the commodity text according to the linked knowledge graph to determine the illegality of the commodity.
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公开(公告)号:US12106589B2
公开(公告)日:2024-10-01
申请号:US18491818
申请日:2023-10-23
Applicant: ZHEJIANG LAB
CPC classification number: G06V20/70 , G06F40/30 , G16H30/40 , G06V2201/03
Abstract: A cross-media knowledge semantic representation method and apparatus. The method comprises: performing data acquisition according to a preset semantic description; inputting data information of a topological structure acquired by the data acquisition into a preset stack of an automat corresponding to the semantic description, the finite state set is used for indicating states included in the automat, and the input vocabulary list is used for indicating vocabularies included in the automat; mapping the data information by the automat to obtain key frames corresponding respectively to substructures and/or branches of a target object acquired by the data acquisition; and generating a visual semantic representation of the topological structure according to the key frames corresponding respectively to the substructures and/or branches of the target object acquired by the data acquisition, such that cross-media knowledge alignment is realized.
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公开(公告)号:US20240314074A1
公开(公告)日:2024-09-19
申请号:US18550104
申请日:2023-06-30
Applicant: ZHEJIANG LAB
Inventor: Lincheng XU , Ruyun ZHANG , Tao ZOU , Xinbai DU , Peilong HUANG , Peilei WANG
CPC classification number: H04L45/76 , H04L12/4645 , H04L2212/00
Abstract: The present disclosure relates to a data processing method and apparatus, a storage medium and an electronic device. In the method, after a switch chip receives a data frame, the data frame is analyzed by a data analysis model deployed in a data processing unit and based on an analysis result, a processing policy for the data frame is determined, and the switch chip processes the data frame based on the processing policy.
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公开(公告)号:US20240303277A1
公开(公告)日:2024-09-12
申请号:US18396493
申请日:2023-12-26
Inventor: Yu ZHANG , Hao QI , Kang LUO , Jin ZHAO , Zhan ZHANG
IPC: G06F16/901
CPC classification number: G06F16/9024
Abstract: Systems, methods, devices and storage media for graph data processing are provided. In one aspect, a graph data processing system includes a memory and a plurality of processing units, and each processing unit is provided with a decision module. Each processing unit is configured to determine set operations required for extracting one or more subgraphs matching a specified graph pattern from target graph data according to a preset graph pattern matching algorithm. Then, for each set operation, the decision module is configured to determine a cost value corresponding to a performance of the processing unit occupied to execute the set operation in accordance with different execution policies, and further select a target execution policy with a smallest cost value to execute the set operation.
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公开(公告)号:US12073192B2
公开(公告)日:2024-08-27
申请号:US18488991
申请日:2023-10-17
Applicant: ZHEJIANG LAB
IPC: G06F7/503
CPC classification number: G06F7/503
Abstract: The present application discloses a full adder circuit and a multi-bit full adder. In the full adder circuit, an in-memory computing field-effect transistor stores data and performs logic operation on the data in the transistor and the loaded data according to different input signals; and a low-area full adder circuit is realized with very few transistors through the characteristics and the reading and writing modes of the in-memory computing field-effect transistor. The full adder circuit has a simple structure, which is greatly reduces the area and complexity of the full adder circuit, and saves 19 transistors compared with the traditional CMOS full adder circuits.
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