公开(公告)号：US20190310864A1

公开(公告)日：2019-10-10

申请号：US15948795

申请日：2018-04-09

Applicant: Advanced Micro Devices, Inc.

Inventor： Anthony T. Gutierrez ,  Sergey Blagodurov ,  Scott A. Moe ,  Xianwei Zhang ,  Jieming Yin ,  Matthew D. Sinclair

IPC: G06F9/445 ,  G06N3/10 ,  G06N3/08 ,  G06N3/04

Abstract: An electronic device includes a controller functional block and a computational functional block. During operation, while the computational functional block executes a test portion of a workload at at least one precision level, the controller functional block monitors a behavior of the computational functional block. Based on the behavior of the computational functional block while executing the test portion of the workload at the at least one precision level, the controller functional block selects a given precision level from among a set of two or more precision levels at which the computational functional block is to execute a remaining portion of the workload. The controller functional block then configures the computational block to execute the remaining portion of the workload at the given precision level.

公开(公告)号：US11922107B2

公开(公告)日：2024-03-05

申请号：US17490789

申请日：2021-09-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Anthony T. Gutierrez ,  Salonik Resch ,  Yasuko Eckert ,  Gabriel H. Loh ,  Mark Henry Oskin ,  Vedula Venkata Srikant Bharadwaj

IPC: G06N10/00 ,  G06F30/347

CPC classification number: G06F30/347 ,  G06N10/00

Abstract: Systems and methods are disclosed that map quantum circuits to physical qubits of a quantum computer. Techniques are disclosed to generate a graph that characterizes the physical qubits of the quantum computer and to compute the resource requirements of each circuit of the quantum circuits. For each circuit, the graph is searched for a subgraph that matches the resource requirements of the circuit, based on a density matrix. Physical qubits, defined by the matching subgraph, are then allocated to the logical qubits of the circuit.

公开(公告)号：US20230102347A1

公开(公告)日：2023-03-30

申请号：US17490789

申请日：2021-09-30

Applicant: Advanced Micro Devices, Inc.

Inventor： Anthony T. Gutierrez ,  Salonik Resch ,  Yasuko Eckert ,  Gabriel H. Loh ,  Mark Henry Oskin ,  Vedula Venkata Srikant Bharadwaj

IPC: G06F30/347 ,  G06N10/00

Abstract: Systems and methods are disclosed that map quantum circuits to physical qubits of a quantum computer. Techniques are disclosed to generate a graph that characterizes the physical qubits of the quantum computer and to compute the resource requirements of each circuit of the quantum circuits. For each circuit, the graph is searched for a subgraph that matches the resource requirements of the circuit, based on a density matrix. Physical qubits, defined by the matching subgraph, are then allocated to the logical qubits of the circuit.

公开(公告)号：US20220100257A1

公开(公告)日：2022-03-31

申请号：US17033000

申请日：2020-09-25

Applicant: Advanced Micro Devices, Inc.

Inventor： Vedula Venkata Srikant Bharadwaj ,  Shomit N. Das ,  Anthony T. Gutierrez ,  Vignesh Adhinarayanan

IPC: G06F1/3287 ,  G06F1/324 ,  G06F1/3296 ,  G06F9/50

Abstract: Systems, methods, devices, and computer-implemented instructions for processor power management implemented in a compiler. In some implementations, a characteristic of code is determined. An instruction based on the determined characteristic is inserted into the code. The code and inserted instruction are compiled to generate compiled code. The compiled code is output.

公开(公告)号：US20200379820A1

公开(公告)日：2020-12-03

申请号：US16425881

申请日：2019-05-29

Applicant: Advanced Micro Devices, Inc.

Inventor： Alexandru Dutu ,  Sergey Blagodurov ,  Anthony T. Gutierrez ,  Matthew D. Sinclair ,  David A. Wood ,  Bradford M. Beckmann

IPC: G06F9/52 ,  G06F9/48 ,  G06F11/30 ,  G06F11/34

Abstract: A technique for synchronizing workgroups is provided. Multiple workgroups execute a wait instruction that specifies a condition variable and a condition. A workgroup scheduler stops execution of a workgroup that executes a wait instruction and an advanced controller begins monitoring the condition variable. In response to the advanced controller detecting that the condition is met, the workgroup scheduler determines whether there is a high contention scenario, which occurs when the wait instruction is part of a mutual exclusion synchronization primitive and is detected by determining that there is a low number of updates to the condition variable prior to detecting that the condition has been met. In a high contention scenario, the workgroup scheduler wakes up one workgroup and schedules another workgroup to be woken up at a time in the future. In a non-contention scenario, more than one workgroup can be woken up at the same time.

公开(公告)号：US20200065113A1

公开(公告)日：2020-02-27

申请号：US16109567

申请日：2018-08-22

Applicant: Advanced Micro Devices, Inc.

Inventor： Anthony T. Gutierrez

IPC: G06F9/38 ,  G06F9/30 ,  G06T1/20

Abstract: Techniques for improving performance of accelerated processing devices (“APDs”) when exceptions occur are provided. In APDs, the very large number of parallel processing execution units, and the complexity of the hardware used to execute a large number of work-items in parallel, means that APDs typically stall when an exception occurs (unlike in central processing units (“CPUs”), which are able to execute speculatively and out-of-order). However, the techniques provided herein allow at least some execution to occur past exceptions. Execution past an exception generating instruction occurs by executing instructions that would not lead to a corruption while skipping those that would lead to a corruption. After the exception has been satisfied, execution occurs in a replay mode in which the potentially exception-generating instruction is executed and in which instructions that did not execute in the exception-wait mode are executed. A mask and counter are used to control execution in replay mode.