公开(公告)号：US10068851B1

公开(公告)日：2018-09-04

申请号：US15608733

申请日：2017-05-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/52 ,  H01L23/532 ,  H01L23/482 ,  H01L23/498 ,  H01L23/31 ,  H01L23/00 ,  H01L23/495

Abstract: A semiconductor package structure includes a first dielectric layer, a conductive element, a first circuit structure, a semiconductor die and an encapsulant. The first dielectric layer defines at least one through hole. The conductive element is disposed in the through hole and including a first portion and a second portion. A first surface of the first portion is substantially coplanar with a first surface of the first dielectric layer, and a portion of a first surface of the second portion is recessed from the first surface of the first dielectric layer. The first circuit structure is disposed on the first dielectric layer. The semiconductor die is electrically connected to the first circuit structure. The encapsulant covers the semiconductor die.

公开(公告)号：US11239174B2

公开(公告)日：2022-02-01

申请号：US16728789

申请日：2019-12-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L25/18 ,  H01L23/538 ,  H01L23/00 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31 ,  H01L25/00 ,  H01L23/498

Abstract: A semiconductor package structure includes a first semiconductor die, a second semiconductor die, a third semiconductor die and an external contact. The second semiconductor die is disposed adjacent to the first semiconductor die. The third semiconductor die electrically connects the first semiconductor die and the second semiconductor die. The external contact is electrically connected to the third semiconductor die. An electrical path between the third semiconductor die and the external contact extends through a space between the first semiconductor die and the second semiconductor die.

公开(公告)号：US10964616B2

公开(公告)日：2021-03-30

申请号：US16443577

申请日：2019-06-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L21/00 ,  H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L21/78 ,  H01L21/56

Abstract: A semiconductor package structure includes a first semiconductor die, an encapsulant surrounding the first semiconductor die, and a redistribution layer (RDL) electrically coupled to the first semiconductor die. The encapsulant has a first surface over the first semiconductor die and a second surface under the first semiconductor die. The RDL has a first portion under the first surface of the encapsulant and a second portion over the first surface of the encapsulant.

公开(公告)号：US10692804B2

公开(公告)日：2020-06-23

申请号：US15998409

申请日：2018-08-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/538 ,  H01L21/48

Abstract: A semiconductor device package includes an interposer and a semiconductor device. The interposer has a sidewall defining a space. The semiconductor device is disposed within the space and in contact with the sidewall. An interposer includes a first surface, a second surface and a third surface. The first surface has a first crystal orientation. The second surface is opposite the first surface and has the first crystal orientation. The third surface connects the first surface to the second surface, and defines a space. An angle defined by the third surface and the first surface ranges from about 90° to about 120°.

公开(公告)号：US10685934B2

公开(公告)日：2020-06-16

申请号：US15645975

申请日：2017-07-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Jen-Kuang Fang ,  Wen-Long Lu

IPC: H01L23/48 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31

Abstract: A semiconductor device package includes an electronic component, a first set of conductive wires electrically connected to the electronic component, and an insulation layer surrounding the first set of conductive wires. The insulation layer exposes a portion of the first set of the conductive wires. The insulation layer is devoid of a filler.

公开(公告)号：US10566279B2

公开(公告)日：2020-02-18

申请号：US15880377

申请日：2018-01-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu ,  Jen-Kuang Fang ,  Min Lung Huang ,  Chan Wen Liu ,  Ching Kuo Hsu

IPC: H01L23/31 ,  H01L23/522 ,  H01L23/498 ,  H01L21/56 ,  H01L21/48

Abstract: A package device includes a circuit layer, at least one conductive segment, an encapsulant and a redistribution layer. The conductive segment is disposed on the circuit layer and has a first surface and a second surface. The encapsulant encapsulates at least a portion of the conductive segment and has a first upper surface. A first portion of the first surface and at least a portion of the second surface of the conductive segment are disposed above the first upper surface of the encapsulant. The redistribution layer is disposed on the encapsulant, the first portion of the first surface of the conductive segment, and the second surface of the conductive segment.

公开(公告)号：US10510705B2

公开(公告)日：2019-12-17

申请号：US15858714

申请日：2017-12-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/29 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10 ,  H01L21/56 ,  H01L21/3105 ,  H01L21/683

Abstract: A semiconductor package structure includes a first semiconductor die, a second semiconductor die, a plurality of conductive elements, a first encapsulant and a second encapsulant. The second semiconductor die is disposed on the first semiconductor die. The conductive elements each comprises a first portion and a second portion and are disposed around the first semiconductor die and the second semiconductor die. The first encapsulant surrounds the first semiconductor die and the respective first portions of the conductive elements. The second encapsulant covers a portion of a top portion of the first semiconductor die and surrounds the respective second portions of the conductive elements.

公开(公告)号：US10438885B1

公开(公告)日：2019-10-08

申请号：US16015025

申请日：2018-06-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu

IPC: H01L23/498 ,  H01L23/538 ,  H01L21/48

Abstract: A semiconductor device package includes a first dielectric layer, a first conductive layer, an electronic component, a second dielectric layer, a second conductive layer and a package body. The first dielectric layer has a top surface, a bottom surface opposite to the top surface and a lateral surface extending between the top surface and the bottom surface. The first conductive layer is disposed on the top surface of the first dielectric layer. The electronic component is disposed on the top surface of the first dielectric layer. The second dielectric layer covers the bottom surface and a first portion of the lateral surface of the first dielectric layer and exposes a second portion of the lateral surface of the first dielectric layer. The second conductive layer is disposed on a bottom surface of the second dielectric layer and electrically connected to the first conductive layer. The package body covers the electronic component, the top surface of the second dielectric layer and the second portion of the lateral surface of the first dielectric layer.

公开(公告)号：US10424539B2

公开(公告)日：2019-09-24

申请号：US15387018

申请日：2016-12-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu ,  Ching Kuo Hsu

IPC: H01L23/522 ,  H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L23/31

Abstract: A wiring structure includes a main body, a first dielectric layer, a first circuit layer and a second dielectric layer. The first dielectric layer is disposed on the main body, and defines a plurality of first grooves and at least one receiving portion between two first grooves. The first circuit layer is disposed on the first dielectric layer, and includes at least one first conductive trace disposed on the receiving portion. A width of the first conductive trace is less than a width of the receiving portion. A second dielectric layer disposed on the first dielectric layer, and extends into the first grooves.

公开(公告)号：US10388598B2

公开(公告)日：2019-08-20

申请号：US15818337

申请日：2017-11-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long Lu ,  Min Lung Huang

IPC: H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/683

Abstract: A semiconductor process includes: (a) attaching a metal layer on a carrier; (b) removing a portion of the metal layer to form a through hole and at least one metal via, wherein the at least one metal via is disposed in the through hole, and the at least one metal via is separated from a side wall of the through hole by a space; and (c) forming a redistribution layer on the metal layer, wherein the redistribution layer is electrically connected to the at least one metal via.