公开(公告)号：US11720511B2

公开(公告)日：2023-08-08

申请号：US17336570

申请日：2021-06-02

Applicant: Arm Limited

Inventor： Arthur Brian Laughton

IPC: G06F13/40 ,  G06F16/22

CPC classification number: G06F13/4027 ,  G06F16/2246

Abstract: An apparatus comprises interface circuitry to receive requests and selection circuitry responsive to the interface circuitry receiving a given request to select, from a pool of items, at least one selected item to be associated with the given request. The selection circuitry comprises a plurality of nodes arranged in a tree structure, each node being configured to select m output signals from n input signals provided to that node, wherein n>m. The apparatus comprises control circuitry configured to output, in dependence on a type of the given request, a suppression signal, and the tree structure comprises a gate node configured to suppress, in response to the suppression signal having a first value, selection from input signals received from a given portion of the tree structure to prevent a subset of the pool of items from being selected for at least one type of request.

公开(公告)号：US10796040B2

公开(公告)日：2020-10-06

申请号：US16267498

申请日：2019-02-05

Applicant: Arm Limited

Inventor： Sean James Salisbury ,  Zheng Xu ,  Arthur Brian Laughton ,  Charles Filip Brej

IPC: G06F30/30 ,  G06F30/394 ,  G06F30/398 ,  G06F9/30

Abstract: A method comprises generating, using a computer, an integrated circuit layout including a plurality of data handling nodes interconnected by routing circuitry defining data packet routes between the plurality of data handling nodes; for a transaction source node configured to generate data packets associated with a data handling translation between that transaction source node and a transaction target node and having one or more routing data fields controlling routing of the data packet, detecting, using the computer, a difference between a first routing controlled by the one or more routing data fields and a selected second routing provided by the integrated circuit layout; and providing, using the computer, one or more data mapping nodes in the integrated circuit layout to map an initial value of one or more of the routing data fields of a data packet generated by the transaction source node to a mapped data value, so that the mapped data value controls routing of the data packet using the selected second routing.

公开(公告)号：US10423346B2

公开(公告)日：2019-09-24

申请号：US15430824

申请日：2017-02-13

Applicant: ARM Limited

Inventor： Arthur Brian Laughton

IPC: G06F1/32 ,  G06F3/06

Abstract: An apparatus for processing data 2 contains multiple power domains which may be in a non-retaining power state or a retaining power state. If a power domain is in a non-retaining power state in which it is not able to retain a copy of a stored parameter value and it is switched into a retaining power state in which it requires a copy of that parameter value, then it fetches the parameter value from a store within another power domain. One of the power domains contains a master copy of the parameter value to which writes changing in the parameter value are made. At least one of the other power domains fetches a copy of the parameter value if required from a power domain other than the power domain containing the master copy.