公开(公告)号：US5510947A

公开(公告)日：1996-04-23

申请号：US367747

申请日：1995-01-03

Applicant: Franco Pellegrini ,  Marco Morelli ,  Athos Canclini

Inventor： Franco Pellegrini ,  Marco Morelli ,  Athos Canclini

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/02 ,  H01L27/06 ,  H01L29/78 ,  H03K17/08 ,  H03K19/003 ,  H02H9/04

CPC classification number: H01L27/0248

Abstract: In an anti-ESD protective structure, especially designed for pins destined to reach below ground and/or above supply voltages, includes a pair of Zener diodes or lateral NPN structures with a resistive connection between base and emitter, connected in opposition among each other between the pin to be protected and a grounded substrate of the integrated circuit. An amplifying effect on the leakage current which is drawn/injected through the pin by the protective structure caused by the triggering of an intrinsic parasitic transistor is effectively eliminated by connecting a biasing element, such as a forward biased junction, between the node of interconnection between the two Zener orlateral NPN structures and a node of the integrated circuit biased with a voltage sufficiently high as to ensure, under any condition, a reverse biasing of the base-emitter junction of the parasitic transistor.

Abstract translation: 在防静电保护结构中，特别针对目的地达到低于地和/或高于电源电压的引脚设计，包括一对齐纳二极管或侧向NPN结构，其具有基极和发射极之间的电阻连接， 待保护的引脚和集成电路的接地基板。 通过在内部寄生晶体管的触发引起的保护结构通过引脚引出/注入的漏电流的放大效应通过在诸如正向偏置结之间的偏置元件之间连接在第 两个齐纳边的NPN结构和集成电路的一个节点，其偏压电压足够高，以确保在任何条件下寄生晶体管的基极 - 发射极的反偏置。

公开(公告)号：US5341005A

公开(公告)日：1994-08-23

申请号：US941520

申请日：1992-09-08

Applicant: Athos Canclini

Inventor： Athos Canclini

IPC: H01L27/04 ,  H01L21/331 ,  H01L21/822 ,  H01L27/02 ,  H01L27/06 ,  H01L29/73 ,  H01L29/732 ,  H01L29/866 ,  H01L29/08 ,  H01L29/44

CPC classification number: H01L27/0248

Abstract: An integrated protective structure provides protection from electrostatic discharges of structures to an integrated circuit functionally connected to a certain external pin. The protective structure is formed in a single epitaxial tub and includes a triggering Zener diode and a vertical bipolar transistor. The collector region of the vertical bipolar transistor is connected to the pin and constitutes also one of the two terminal regions of the triggering Zener. Around the emitter region and separated therefrom by the smallest distance feasible, is an annular region, having a heavier doping than the base region of the transistor formed with the purpose of intercepting the avalanche current of the Zener junction and distributing it in a uniform manner into the base region of the vertical transistor as well as acting as a shield for eventual electrons moving from the emitter region toward the breakdown junction. Optionally, a further emitter region, may be formed in front of the collector/cathode region and connected to the annular region in order to create a lateral bipolar transistor which triggers-on during an electrostatic discharge; thus, reducing the ohmic drop through the protective structure and the breakdown voltage.

Abstract translation: 集成的保护结构提供了防止结构静电放电到功能连接到某个外部引脚的集成电路的保护。 保护结构形成在单个外延槽中，并且包括触发齐纳二极管和垂直双极晶体管。 垂直双极晶体管的集电极区域连接到引脚，并且也构成触发齐纳二极管区域之一。 围绕发射极区域并且与其分离最小距离可行的是环形区域，其具有比形成的晶体管的基极区域更重的掺杂，其目的是截断齐纳结的雪崩电流并以均匀的方式将其分布 垂直晶体管的基极区域以及作为最终电子从发射极区域向击穿结移动的屏蔽。 可选地，另外的发射极区域可以形成在集电极/阴极区域的前面并连接到环形区域，以便产生在静电放电期间触发的横向双极晶体管; 从而减小了通过保护结构的电阻和击穿电压。