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公开(公告)号:US20240241415A1
公开(公告)日:2024-07-18
申请号:US18574261
申请日:2023-01-10
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lizhong WANG , Guangcai YUAN , Ce NING , Jianbo XIAN , Liping LEI , Chunping LONG , Yunping DI , Binbin TONG , Zhen ZHANG
IPC: G02F1/1368 , G02F1/1362
CPC classification number: G02F1/1368 , G02F1/136222 , G02F1/136286
Abstract: An array substrate and a display panel. The array substrate includes: a base substrate; a gate line and a data line on the base substrate, the gate line intersect the data line to define a pixel region; a metal oxide thin film transistor is arranged in the pixel region, the metal oxide thin film transistor includes a metal oxide semiconductor layer; the metal oxide semiconductor layer includes a first part and a second part; the first part and the data line are connected through a first via hole; the first part is in a stripe shape; a first included angle is between extension directions of the first part and the data line; an orthographic projection of the second part overlap with an orthographic projection of the gate line on the base substrate and do not overlap with an orthographic projection of the data line on the base substrate.
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公开(公告)号:US20230337507A1
公开(公告)日:2023-10-19
申请号:US17044845
申请日:2020-04-03
Inventor: Xinwei WU , Zhen ZHANG , Wei ZHANG , Jonguk KWAK , Cunzhi LI
IPC: H10K59/80 , H10K59/122 , H10K59/12 , H10K59/131 , H10K71/00
CPC classification number: H10K59/873 , H10K59/122 , H10K59/1201 , H10K59/131 , H10K71/00
Abstract: A display substrate includes a cut-out area; a display region; and an isolation region including an isolation pillar and at least two packing dams; a base substrate; a barrier layer; a buffer layer; a first gate insulation layer; a second gate insulation layer; and an interlayer insulation layer. The isolation pillar is formed of a portion of the barrier layer, a portion of the buffer layer, a portion of the first gate insulation layer, a portion of the second gate insulation layer, and a portion the interlayer insulation layer. A side of the side end surface proximal to the substrate is indented inward compared to the side facing away from the substrate. A light emitting layer on the side of the structural layer facing away from the substrate is discontinuous at least at a position having an indented structure.
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公开(公告)号:US20220276540A1
公开(公告)日:2022-09-01
申请号:US17504402
申请日:2021-10-18
Applicant: BOE Technology Group Co., Ltd.
Inventor: Lizhong WANG , Ce NING , Binbin TONG , Zhen ZHANG , Fuqiang LI , Zhenyu ZHANG
IPC: G02F1/1362 , G02F1/1368 , H01L27/12 , H01L29/786 , H01L21/02 , H01L29/66
Abstract: The disclosure provides an array substrate, a manufacturing method thereof and a display panel, and relates to the technical field of display. The array substrate comprises a first transistor arranged on one side of a substrate base, the first transistor being located in an active area of the array substrate; a flat layer covering the first transistor, the flat layer having a first through-hole; a first electrode layer arranged in the first through-hole, and being connected with a drain of the first transistor and having a first groove; a filling layer arranged in the first groove; and a second electrode layer arranged on a side, away from the first transistor, of the filling layer, the second electrode layer being connected with the first electrode layer. So an electric field for driving a liquid crystal layer is more uniform, thereby improving an aperture ratio of the display panel.
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公开(公告)号:US20210361862A1
公开(公告)日:2021-11-25
申请号:US16488350
申请日:2018-11-30
Inventor: Peng LI , Jiong HUANG , Zhen ZHANG , Lingxiao HU
Abstract: A liquid transfer control device and a liquid transfer apparatus are provided. The liquid transfer control device includes a tube carrier, configured to accommodate at least one portion of a tube, a flow rate sensor, configured to detect a flow rate of liquid transferred in the tube; a regulator, configured to regulate the flow rate of the liquid transferred in the tube; and a controller, configured to output a control signal to the regulator based on the flow rate detected by the flow rate sensor, wherein, the regulator is further configured to, in response to the control signal outputted by the controller, regulate the flow rate of the liquid in the tube accommodated in the tube carrier.
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公开(公告)号:US20210210569A1
公开(公告)日:2021-07-08
申请号:US16767249
申请日:2019-11-29
Inventor: Zhen ZHANG , Xinwei WU , Kangguan PAN , Lei DENG , Huimin CAO , FEI LI , Wei HUANG , Fuwei ZOU , Xia TANG , Xijie PENG , Lin WEN , Xudong AN , Junjie ZHAO , Yue WEI , Yuqing YANG
Abstract: A backplane, a display device and a method of manufacturing a backplane are provided. The backplane includes a base substrate; an inorganic layer on the base substrate, the inorganic layer including a plurality of protrusions; a metal layer covering atop of each protrusion and partial side wall near the top, the metal layer covering adjacent protrusions being disconnected; and a light-emitting layer covering the metal layer and the inorganic layer between the adjacent protrusions, the light-emitting layer being disconnected at regions of the protrusions not covered by the metal layer.
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公开(公告)号:US20210132282A1
公开(公告)日:2021-05-06
申请号:US16640171
申请日:2019-05-07
Inventor: Fangfang WU , Zhen ZHANG , Jinfeng ZHANG , Haifeng XU
IPC: F21V8/00
Abstract: Provided is a backlight module and a display device. The backlight module includes a first optical structure provided in the first region of the light entering surface of the light guide plate and a plurality of second regions each located between two adjacent first regions. The first optical structure is configured to enable a part of light emitted by a corresponding light source to enter an inside of the light guide plate and reflect a part of light to the lamp bar. The second optical structure is configured to reflect light reaching the second optical structure back to the light entering surface of the light guide plate.
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公开(公告)号:US20250151504A1
公开(公告)日:2025-05-08
申请号:US19017860
申请日:2025-01-13
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guangcai YUAN , Hehe HU , Changhan HSIEH , Wei YANG , Liwen DONG , Jiayu HE , Dongfei HOU , Zhen ZHANG , Ce NING , Xin GU , Zhengliang LI
IPC: H10K10/46 , G02F1/1333 , G02F1/1362 , H10K19/10
Abstract: An array substrate includes a base substrate, a first conductive layer, a first electrode, an organic planarization layer and an organic active layer. The first conductive layer is provided on a side of the base substrate. The first electrode is provided on a side of the first conductive layer away from the base substrate, an orthographic projection of the first electrode on the base substrate overlapping an orthographic projection of the drain electrode on the base substrate. The organic planarization layer is provided on a side of the first electrode away from the base substrate, first via holes being provided in the organic planarization layer. The organic active layer is provided on a side of the organic planarization layer away from the base substrate, the organic active layer being connected to the source electrode by a first via hole and connected to the drain electrode by a first via hole.
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公开(公告)号:US20220271107A1
公开(公告)日:2022-08-25
申请号:US17742499
申请日:2022-05-12
Inventor: Tingliang LIU , Zhen ZHANG , Ke DAI
Abstract: An array substrate, a manufacturing method thereof and a display panel are provided. The array substrate includes sub-pixel units, and each sub-pixel unit includes a light emitting region and a non-light emitting region; each sub-pixel unit includes a light emitting element, the light emitting element includes a light emitting layer and a first electrode, and at least a part of the first electrode is in the light emitting region. A plurality of first wires are configured to supply a power signal to the light emitting element and include a first sub-wire; the first sub-wire includes a plurality of portions, adjacent two of the plurality of portions are spaced apart from each other by an opening in the light emitting region; at least a part of an orthographic projection of the opening on the array substrate does not overlap with an orthographic projection of the first electrode on the array substrate.
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19.
公开(公告)号:US20210233988A1
公开(公告)日:2021-07-29
申请号:US17044281
申请日:2019-12-20
Inventor: Yulong WEI , Zhen ZHANG
IPC: H01L27/32 , H01L51/56 , G06K9/00 , G09G3/3275 , G09G3/3266
Abstract: A display substrate, a method for manufacturing the display substrate, a display panel and a display device are provided. The display substrate includes a base substrate, and a light-shielding layer and a TFT array layer arranged sequentially in that order on the base substrate. Imaging pinholes are formed in the light-shielding layer. A first protection layer is arranged between the light-shielding layer and the TFT array layer. The base substrate is provided with a first region, an orthogonal projection of a metal film layer of the TFT array layer onto the base substrate is located outside the first region, and at least a part of an orthogonal projection of the imaging pinhole onto the base substrate is located within the first region. An orthogonal projection of the first protection layer onto the base substrate at least covers a part of the first region. The first region includes a pinhole region.
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公开(公告)号:US20210066203A1
公开(公告)日:2021-03-04
申请号:US16880592
申请日:2020-05-21
Inventor: Zhen ZHANG , Xinwei WU , Huimin CAO , Kangguan PAN , Fei LI , Yuqing YANG , Yue WEI
IPC: H01L23/544 , H01L27/32 , G02F1/1333 , G02F1/1345
Abstract: A display substrate has a display area and a peripheral area. The display substrate includes a base, a first insulating layer disposed above the base, a first alignment pattern disposed in the peripheral area on a surface of the first insulating layer facing away from the base, and a second alignment pattern disposed in the peripheral area at a side of the first insulating layer away from the base. An orthographic projection of the second alignment pattern on the base and an orthographic projection of the first alignment pattern on the base have a non-overlapping region therebetween, and the second alignment pattern is in contact with the first insulating layer in the non-overlapping region. Adhesion between the second alignment pattern and the first insulating layer is greater than adhesion between the second alignment pattern and the first alignment pattern.
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