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公开(公告)号：US20250048832A1
公开(公告)日：2025-02-06
申请号：US18922850
申请日：2024-10-22
Inventor： Chuanxiang XU , Shi SHU , Qi YAO , Guangcai YUAN , Yang YUE , Haitao HUANG , Yong YU
IPC: H10K50/86 , G06F3/041 , H10K50/844 , H10K50/854 , H10K59/38 , H10K59/40
Abstract: The present application relates to the technical field of display, and discloses an OLED display panel and a display device. The OLED display panel includes a drive backplane; and an OLED device, an encapsulation structure and a color resistor structure which are arranged on the drive backplane; the encapsulation structure and the color resistor structure are located on a side, facing away from the drive backplane, of the OLED device, and the color resistor structure includes a chromatic color resistor layer, a first BM and a second BM; and the first BM is located on a side, facing away from the drive backplane, of the chromatic color resistor layer, and the second BM is located on a side, facing the drive backplane, of the chromatic color resistor layer.
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公开(公告)号：US20250004180A1
公开(公告)日：2025-01-02
申请号：US18708769
申请日：2021-12-02
Applicant: BOE Technology Group Co., Ltd.
Inventor： Guangcai YUAN , Renquan GU , Qi YAO , Feng ZHANG , Xin GU , Kang GUO
Abstract: Provided in the embodiments of the present disclosure are a microlens structure, a manufacturing method therefor, and the related use thereof. The microlens structure comprises: a base substrate; a plurality of first microlenses, which are located on the base substrate and arranged at intervals; and a plurality of second microlenses, which are located on the base substrate and are located in gaps between the first microlenses, wherein edges of at least part of the second microlenses overlap edges of the corresponding first microlenses.
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公开(公告)号：US20240414990A1
公开(公告)日：2024-12-12
申请号：US18704044
申请日：2021-12-02
Applicant: BOE Technology Group Co., Ltd.
Inventor： Renquan GU , Huili WU , Shipei LI , Sheng XU , Wei HE , Lizhen ZHANG , Qi YAO , Feng ZHANG , Kang GUO , Guangcai YUAN , Xue DONG
Abstract: Embodiments of the present disclosure provide a microlens structure and a manufacturing method therefor, and a display apparatus. The microlens structure comprises: a base substrate; and a plurality of microlenses, located at one side of the base substrate, wherein the material of each microlenses comprises a product generated after crosslinking a non-photosensitive resin monomer.
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公开(公告)号：US20240402397A1
公开(公告)日：2024-12-05
申请号：US18695820
申请日：2023-07-06
Applicant: BOE Technology Group Co., Ltd.
Inventor： Kang GUO , Duohui LI , Mengya SONG , Shi SHU , Feng ZHANG , Renquan GU , Xin GU , Guangcai YUAN , Xue DONG , Jing YU
Abstract: A microlens array substrate (200) and a preparation method therefor, and a display device. The microlens array substrate (200) comprises: a base; a microlens film layer disposed on a side of the base and comprising at least one microlens array, the microlens array comprises a plurality of microlenses and a spacer portion between adjacent microlenses; a barrier layer disposed on a side of the microlens film layer away from the base, an orthographic projection of at least part of the barrier layer on the base is overlapped with an orthographic projection of the microlenses on the base; a light shielding layer disposed on a side of the microlens film layer away from the base and comprising at least one light shielding pattern, an orthographic projection of the at least one light shielding pattern on the base is overlapped with an orthographic projection of the spacer portion on the base.
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公开(公告)号：US20240371887A1
公开(公告)日：2024-11-07
申请号：US18773582
申请日：2024-07-16
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yuhang LU , Fengjuan LIU , Hehe HU , Zhengliang LI , Ce NING , Guangcai YUAN , Dandan ZHOU , Cheng XU
IPC: H01L27/12 , G02F1/1333 , G02F1/1362 , G02F1/1368 , H01L25/075 , H01L29/66 , H01L29/786 , H10K59/121
Abstract: A thin film transistor includes a first active layer, a second active layer, a first electrode, a second electrode and a third electrode. The first active layer includes a first surface away from a substrate. The second active layer includes a second surface in contact with the first surface. The first electrode, the first active layer and the second active layer have an overlapping region. The second electrode, the first active layer and the second active layer have an overlapping region. The third electrode, the first active layer and the second active layer have an overlapping region, and the third electrode is opposite to the second electrode. The second surface is located within the first surface, and a distance between at least part of a border of the second surface and a border of the first surface is less than or equal to 0.5 μm.
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Patent Agency Ranking
公开(公告)号：US20240329478A1
公开(公告)日：2024-10-03
申请号：US18638710
申请日：2024-04-18
Applicant: BOE Technology Group Co., Ltd.
Inventor： Guangcai YUAN , Hehe HU , Ce NING , Hui GUO , Fengjuan LIU , Dongfang WANG , Zhengliang LI , Jiayu HE
IPC: G02F1/1368 , G02F1/1362 , H01L27/12
CPC classification number: G02F1/1368 , G02F1/136209 , G02F1/136213 , G02F1/136227 , G02F1/136295 , H01L27/124 , H01L27/1255 , H01L27/1259
Abstract: An array substrate and a manufacturing method therefor, and a display apparatus are provided. The array substrate includes an underlay substrate, and at least one first transistor, at least one data line and at least one pixel electrode disposed on the underlay substrate. The at least one first transistor includes a first active layer and a first gate; the first gate is located on a side of the first active layer away from the underlay substrate, and orthographic projections of the first gate and the first active layer on the underlay substrate are at least partially overlapped. The first active layer is electrically connected to the data line and the pixel electrode, respectively. The data line is located on a side of the first active layer close to the underlay substrate, and the pixel electrode is located on a side of the first gate away from the underlay substrate.
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公开(公告)号：US20240324335A1
公开(公告)日：2024-09-26
申请号：US18245553
申请日：2022-01-30
Applicant: BOE Technology Group Co., Ltd.
Inventor： Jinxiang XUE , Zhongyuan SUN , Wenqi LIU , Jingkai NI , Che AN , Guangcai YUAN , Lu WANG , Fang LIU , Xiaohu LI , Liangliang KANG , Zhiqiang JIAO , Peng WANG
IPC: H10K59/131 , H10K59/121 , H10K59/122 , H10K59/18 , H10K59/80 , H10K77/10 , H10K102/00
CPC classification number: H10K59/131 , H10K59/1213 , H10K59/1216 , H10K59/122 , H10K59/18 , H10K59/873 , H10K77/111 , H10K2102/311
Abstract: The present disclosure provides a display panel and a display device. The display panel includes: a substrate; a plurality of display units arranged on a side of the substrate, each of the plurality of display units including at least one sub-pixel; a plurality of elastic stretching units arranged on a side of the substrate, each of the plurality of elastic stretching units being connected between two adjacent display units, and a plurality of hollow regions being formed between the plurality of elastic stretching units and the plurality of display units. A sum of areas of the plurality of hollow regions is a, a sum of areas of the plurality of display units is b, and a sum of areas of the plurality of elastic stretching units is c; 15%≤a/(a+b+c)×100%≤30%.
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公开(公告)号：US20240178238A1
公开(公告)日：2024-05-30
申请号：US17789505
申请日：2021-06-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Dongfang WANG , Ce NING , Guangcai YUAN
IPC: H01L27/12
CPC classification number: H01L27/1244 , H01L27/1222 , H01L27/1251 , H01L27/127
Abstract: An array substrate includes: a base; gate lines and data lines on the base; multiple pixel units each including a thin film transistor; first and second conductive layers with a first insulating layer therebetween. The first conductive layer includes a first wiring pattern, the second conductive layer includes a first interconnection pattern, orthographic projections of the first wiring pattern and the first interconnection pattern on the base are at least partially overlapped. The first wiring pattern is connected with the first interconnection pattern through a via hole. Each of part of data lines is located in the first conductive layer and has an auxiliary line formed by the first interconnection pattern in the second conductive layer. The first wiring pattern includes the data lines; at least one of the data line and the first interconnection pattern is connected to a source of the thin film transistor.
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公开(公告)号：US20240155867A1
公开(公告)日：2024-05-09
申请号：US18416405
申请日：2024-01-18
Inventor： Chuanxiang XU , Shi SHU , Qi YAO , Guangcai YUAN , Yang YUE , Haitao HUANG , Yong YU
IPC: H10K50/86 , G06F3/041 , H10K50/844 , H10K50/854 , H10K59/38 , H10K59/40
CPC classification number: H10K50/865 , G06F3/0412 , H10K50/844 , H10K50/854 , H10K59/38 , H10K59/40
Abstract: The present application relates to the technical field of display, and discloses an OLED display panel and a display device. The OLED display panel includes a drive backplane; and an OLED device, an encapsulation structure and a color resistor structure which are arranged on the drive backplane; the encapsulation structure and the color resistor structure are located on a side, facing away from the drive backplane, of the OLED device, and the color resistor structure includes a chromatic color resistor layer, a first BM and a second BM; and the first BM is located on a side, facing away from the drive backplane, of the chromatic color resistor layer, and the second BM is located on a side, facing the drive backplane, of the chromatic color resistor layer.
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10.发明公开公开(公告)号：US20230165098A1
公开(公告)日：2023-05-25
申请号：US17754225
申请日：2021-05-08
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yongfeng ZHANG , Guangcai YUAN , Xue DONG
CPC classification number: H10K59/353 , H10K59/878 , G02B30/26
Abstract: The present disclosure provides a display substrate, a manufacturing method thereof and a three-dimensional display apparatus. The display substrate includes a base substrate with a plurality of sub-pixels. Each of the sub-pixels includes at least two first electrodes, and a light-emitting function layer disposed on a side of the first electrodes facing away from the base substrate. Each first electrode includes: a transparent conductive portion and a reflective conductive portion arranged in stack. In at least one of the sub-pixels, two adjacent first electrodes correspond to one reflective structure, the reflective structure includes a first portion and a second portion, an orthographic projection of the first portion on the base substrate and an orthographic projection of one first electrode have an overlap area, and an orthographic projection of the second portion on the base substrate an orthographic projection of another first electrode have an overlap area.
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