公开(公告)号：US20240312411A1

公开(公告)日：2024-09-19

申请号：US18665611

申请日：2024-05-16

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yunsik IM ,  Shunhang ZHANG ,  Zhenyu ZHANG ,  Zhen ZHANG ,  Peirou LI ,  Dongni LIU ,  Lianfu YU

IPC: G09G3/3233 ,  G09G3/20

CPC classification number: G09G3/3233 ,  G09G3/2007 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/08

Abstract: A pixel drive circuit is configured to drive a light emitting device to emit light, the light emitting device includes a first electrode and a second electrode, the pixel drive circuit includes a current control sub-circuit and a duration control sub-circuit; the duration control sub-circuit is configured to provide control signal to a first node under control of signals of a first scan signal line, a first reset signal line, a first light emitting signal line, control signal line, a data signal line, an initial signal line, and a first power supply line; the current control sub-circuit is configured to provide a drive current to a first electrode of a light emitting device under control of signals of a first node, a second scan signal line, a second reset signal line, a second light emitting signal line, a Data signal line, and a second power supply line.

公开(公告)号：US20230215333A1

公开(公告)日：2023-07-06

申请号：US18181625

申请日：2023-03-10

Applicant: HEFEI BOE DISPLAY TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zuquan HU ,  Zhenyu ZHANG ,  Haipeng YANG ,  Ke DAI

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2310/08 ,  G09G3/3266

Abstract: A display device, a gate drive circuit, a shift register and a control method are disclosed. The shift register includes a first shift register unit and a second shift register unit, the first shift register unit is configured to write a first control signal to the first node, and write a first clock signal to the first signal output terminal under control of a voltage of the first node; the second shift register unit is configured to write a second clock signal to the second signal output terminal under control of the voltage of the first node; during time of a frame, the first clock signal and a first input signal provided by a first signal input terminal are pulse signals, and the second clock signal is a DC signal.

公开(公告)号：US20220406245A1

公开(公告)日：2022-12-22

申请号：US17642025

申请日：2021-04-08

Applicant: BOE Technology Group Co., Ltd.

Inventor： Hao CHEN ,  Zhenyu ZHANG ,  Jiao ZHAO ,  Li XIAO ,  Dongni LIU ,  Haoliang ZHENG ,  Liang CHEN ,  Minghua XUAN ,  Ming YANG ,  Xinhong LU ,  Qi QI

IPC: G09G3/32 ,  H01L25/075 ,  H01L27/12 ,  H01L33/62 ,  G09G3/00 ,  G01R31/52 ,  G01R31/54

Abstract: An array substrate, a detection method for the array substrate, and a tiled display panel. In the array substrate, each of pixels (1) comprises sub-pixels (01) of at least three colors and a. pixel driving chip (02) for driving each sub-pixel (01) to emit light; each sub-pixel (01) comprises at least one inorganic light-emitting diode; a display area (A1) further comprises: a positive signal line (Tian) connected to a positive electrode of each inorganic light-emitting diode, and a data signal line (Din), a scanning line (Sn), and a reference signal line (Vm) connected to each pixel driving chip (02); each pixel driving chip (02) is used for writing signals of the data signal line (Dm) into the sub-pixels (01) of different colors under the control of the corresponding scanning line (Sn) in a time division manner.

公开(公告)号：US20220335889A1

公开(公告)日：2022-10-20

申请号：US17760733

申请日：2021-03-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Haoliang ZHENG ,  Minghua XUAN ,  Dongni LIU ,  Zhenyu ZHANG ,  Li XIAO ,  Liang CHEN ,  Hao CHEN ,  Jiao ZHAO ,  Lijun YUAN ,  Yi OUYANG ,  Qi QI

IPC: G09G3/3233 ,  G11C19/28

Abstract: A shift register (SR) includes a voltage control circuit (110) and a bias compensation circuit (120). The voltage control circuit (110) is configured to control a voltage at a first node (Output) to be a first voltage or a second voltage. The bias compensation circuit (120) is configured to: when the voltage at the first node (Output) is the first voltage, transmit a first signal received by a first signal terminal (VDD-A) to a first signal output terminal (EM1), and transmit a second signal received by a second signal terminal (VDD-B) to a second signal output terminal (EM2); and in response to the voltage at the first node (Output) being the second voltage, transmit a signal received by a first voltage terminal (LVGL1) to the first signal output terminal (EM1) and the second signal output terminal (EM2).

公开(公告)号：US20210193027A1

公开(公告)日：2021-06-24

申请号：US17086097

申请日：2020-10-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Haoliang ZHENG ,  Dongni LIU ,  Minghua XUAN ,  Zhenyu ZHANG ,  Li XIAO ,  Liang CHEN ,  Hao CHEN ,  Guangliang SHANG ,  Lijun YUAN ,  Xing YAO

IPC: G09G3/32

Abstract: A shift register includes an input sub-circuit, a control sub-circuit, an output sub-circuit and a reset sub-circuit. The input sub-circuit is configured to transmit an input signal from an input signal terminal to a pull-up node. The control sub-circuit is configured to transmit a clock signal from a clock signal terminal to the control node. The output sub-circuit is configured to transmit a second voltage signal from a second voltage signal terminal to a first output signal terminal, and to transmit a first voltage signal from a first voltage signal terminal to the first output signal terminal. The reset sub-circuit is configured to transmit the second voltage signal to the control node to reset the control node, and to transmit a third voltage signal from the third voltage signal terminal to the pull-up node to reset the pull-up node.

公开(公告)号：US20200219428A1

公开(公告)日：2020-07-09

申请号：US16515880

申请日：2019-07-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lijun YUAN ,  Xing YAO ,  Guangliang SHANG ,  Haoliang ZHENG ,  Zhenyu ZHANG

IPC: G09G3/20 ,  G11C19/28

Abstract: A shift register circuit according to an embodiment of the present disclosure includes an input sub-circuit and N-stage output sub-circuits. The input sub-circuit is configured to transmit an input signal to a pull up node at a first stage. The output sub-circuit at each stage is configured to transmit a clock signal from a clock signal terminal at a same stage to an output signal terminal at the same stage under the control of a pull-up node at the same stage. The output sub-circuit at each stage is further configured to transmit a signal transmitted to an output signal terminal at the same stage to a pull-up node at an immediately subsequent stage under the control of a shift control signal from a shift control signal terminal at the same stage.

公开(公告)号：US20190122624A1

公开(公告)日：2019-04-25

申请号：US16049128

申请日：2018-07-30

Applicant: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhenyu ZHANG ,  Fangyu WANG ,  Dongchuan CHEN

IPC: G09G3/36 ,  G02F1/133 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: G09G3/3648 ,  G02F1/13318 ,  G02F1/136213 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2201/121 ,  G09G2320/0626 ,  G09G2320/066 ,  G09G2360/145

Abstract: A pixel unit and a driving method thereof, a liquid crystal panel and a display device are provided. The pixel unit includes a pixel electrode, a control circuit, a light sensing circuit, a data line and a gate line. A control end of the control circuit is connected to the gate line, a first end of the control circuit is connected to the date line, a second end of the control circuit is connected to a first end of the light sensing circuit, and a second end of the light sensing circuit is connected to the pixel electrode. The control circuit is configured to control, under control of the gate line, the data line to be connected to the first end of the light sensing circuit.

公开(公告)号：US20240304136A1

公开(公告)日：2024-09-12

申请号：US18664242

申请日：2024-05-14

Applicant: BOE Technology Group Co., Ltd.

Inventor： Hao CHEN ,  Zhenyu ZHANG ,  Jiao ZHAO ,  Li XIAO ,  Dongni LIU ,  Haoliang ZHENG ,  Liang CHEN ,  Minghua XUAN ,  Ming YANG ,  Xinhong LU ,  Qi QI

IPC: G09G3/32 ,  G01R31/52 ,  G01R31/54 ,  G09F9/33 ,  G09G3/00 ,  H01L25/075 ,  H01L27/12 ,  H01L33/62

CPC classification number: G09G3/32 ,  G01R31/52 ,  G01R31/54 ,  G09G3/006 ,  G09G3/035 ,  H01L25/0753 ,  H01L27/1244 ,  H01L33/62 ,  G09F9/33 ,  G09G2300/0426 ,  G09G2300/0452 ,  G09G2320/0233 ,  G09G2330/021

Abstract: Disclosed are an array substrate, a detection method for the array substrate, and a splicing display panel. In the array substrate, each of pixels (1) includes sub-pixels (01) of at least three colors and a pixel driving chip (02) for driving each sub-pixel (01) to emit light; each sub-pixel (01) includes at least one inorganic light-emitting diode; a display area (A1) further includes: a positive signal line (Hm) connected to a positive electrode of each inorganic light-emitting diode, and a data signal line (Dm), a scanning line (Sn), and a reference signal line (Vm) connected to each pixel driving chip (02); each pixel driving chip (02) is used for writing signals of the data signal line (Dm) into the sub-pixels (01) of different colors under the control of the corresponding scanning line (Sn) in a time division manner.

公开(公告)号：US20240234657A1

公开(公告)日：2024-07-11

申请号：US17756513

申请日：2021-06-25

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ming YANG ,  Xingce SHANG ,  Wei HAO ,  Zhenyu ZHANG ,  Fuqiang LI ,  Wanzhi CHEN

IPC: H01L33/62 ,  H01L25/075

CPC classification number: H01L33/62 ,  H01L25/0753

Abstract: The present disclosure provides an array substrate, a backlight and a display device which both include the array substrate. The array substrate includes multiple light-emitting units arranged in M rows and N columns and multiple first signal lines. Multiple first signal lines are divided into N groups, and each group of first signal lines is electrically connected to a column of light-emitting units. Each group of first signal lines includes at least two first signal lines, for each column of light-emitting units, at least two consecutive rows of light-emitting units are electrically connected to one of the at least two first signal lines, and the remaining at least one row of light-emitting unit is electrically connected to the other one of the at least two first signal lines, M is a positive integer greater than or equal to 3, N is a positive integer greater than or equal to 1.

公开(公告)号：US20240155875A1

公开(公告)日：2024-05-09

申请号：US18280473

申请日：2021-11-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yawei WANG ,  Chuanxiang XU ,  Zhenyu ZHANG ,  Ming YANG ,  Fuqiang LI

IPC: H10K59/122 ,  H10K59/12 ,  H10K59/38

CPC classification number: H10K59/122 ,  H10K59/1201 ,  H10K59/38

Abstract: A display panel includes a driving backplane, provided with a display area including a first sub-area and a second sub-area; a light-emitting layer, located at one side of the driving backplane, and including a pixel definition layer and a plurality of light-emitting devices, the pixel definition layer is provided with a plurality of first light-transmitting holes located in the second sub-area; and a color film layer, located at one side of the light-emitting layer away from the driving backplane, and including a light-shielding portion and a plurality of light-filtering portions separated by the light-shielding portion, the light-filtering portions and the light-emitting devices are arranged in one-to-one correspondence in a direction perpendicular to the driving backplane, the light-shielding portion is provided with a plurality of second light-transmitting holes, and the second light-transmitting holes and the first light-transmitting holes are arranged in one-to-one correspondence in the direction perpendicular to the driving backplane.