摘要:
Imaging arrays comprising at least two different imaging pixel types are described. The different imaging pixel types may differ in their light sensitivities and/or light saturation levels. Methods of processing the output signals of the imaging arrays are also described, and may produce images having a greater dynamic range than would result from an imaging array comprising only one of the at least two different imaging pixel types.
摘要:
An improved monolithic solid state imager comprises plural sub-arrays of respectively different kinds of pixels, an optional filter mosaic comprising color filters and clear elements, and circuitry to process the output of the pixels. The different kinds of pixels respond to respectively different spectral ranges. Advantageously the different kinds of pixels can be chosen from: 1) SWIR pixels responsive to short wavelength infrared (SWIR) in the range of approximately 800-1800 nm; 2) regular pixels responsive to visible and NIR radiation (400-1000 nm) and wideband pixels responsive to visible, NIR and SWIR radiation.
摘要:
Imagers, pixels, and methods of using the same are disclosed for imaging in various spectra, such as visible, near infrared (IR), and short wavelength IR (SWIR). The imager may have an imaging array having pixels of different types. The different types of pixels may detect different ranges of wavelengths in the IR, or the SWIR, spectra. The pixels may include a filter which blocks some wavelengths of radiation in the IR spectrum while passing other wavelengths. The filter may be formed of a semiconductor material, and therefore may be easily integrated with a CMOS pixel using conventional CMOS processing techniques.
摘要:
Imagers, pixels, and methods of using the same are disclosed for imaging in various spectra, such as visible, near infrared (IR), and short wavelength IR (SWIR). The imager may have an imaging array having pixels of different types. The different types of pixels may detect different ranges of wavelengths in the IR, or the SWIR, spectra. The pixels may include a filter which blocks some wavelengths of radiation in the IR spectrum while passing other wavelengths. The filter may be formed of a semiconductor material, and therefore may be easily integrated with a CMOS pixel using conventional CMOS processing techniques.
摘要:
An improved CMOS pixel with a combination of analog and digital readouts to provide a large pixel dynamic range without compromising low-light performance using a comparator to test the value of an accumulated charge at a series of exponentially increasing exposure times. The test is used to stop the integration of photocurrent once the accumulated analog voltage has reached a predetermined threshold. A one-bit output value of the test is read out of the pixel (digitally) at each of the exponentially increasing exposure periods. At the end of the integration period, the analog value stored on the integration capacitor is read out using conventional CMOS active pixel readout circuits.
摘要:
A shield region of metallization is formed in a first metallization layer of an integrated circuit so as to increase the metal density of the first metallization layer to at least a minimum density required for proper fabrication. The shield region is coupled via an amplifier or other suitable coupling mechanism to at least a portion of another metallization layer overlying or underlying the first metallization layer in the integrated circuit, such that the shield region acts to reduce parasitic capacitance associated with a circuit node in the other metallization layer. In an illustrative fingerprint sensor cell implementation, the shield region is in the form of a shield plate underlying a sensor plate in the sensor cell and serves to increase the metal density of a lower-level metallization layer in the cell. The sensor plate is coupled to the shield plate via a unity-gain amplifier, so as to reduce the parasitic capacitance seen by the sensor plate, thereby improving the ability of the sensor cell to detect fingerprint characteristics. The invention can provide similar advantages in numerous other integrated circuit applications.
摘要:
The single-polysilicon active pixel comprises a photo site located on a substrate for generating and storing charge carriers, the charge carriers being generated from photonic energy incident upon the photo site and semiconductor substrate, a photo gate, a transfer transistor and output and reset electronics. The gate of the transfer transistor and the photo gate are defined in a single layer of polysilicon disposed on the semiconductor substrate. The source of transfer transistor is a doped region of substrate, referred to as a coupling diffusion, which provides the electrical coupling between the photo gate and the transfer transistor. The coupling diffusion allows for the transfer of a signal stored in a photo site under the photo gate to the output electronics for processing. The single-polysilicon active pixel may be operated by biasing the transfer transistor to the low operating voltage of the pixel, for example, 0 volts. By virtue of the structure of the single-polysilicon active pixel, this mode of operation results in the same timing as if the transfer transistor were clocked, but neither a clock nor the associated driving circuitry are required. However, there is little no tendency for image lag as occurs in double polysilicon active pixels when they are operated in a manner which avoids clocking the transfer gate.
摘要:
Known signal processors for matching signal patterns commonly compare an unknown signal with one of a set of reference signals. Various comparison techniques are known. One comparison technique for solving a parenthesization problem includes an orthogonal array of interconnected cells which are adapted for dynamic programming and for extending data and control information in a generally left-to-right direction as well as in a bottom-to-top direction. For solving a pattern matching problem, known arrangements for extending control information in a generally left-to-right or bottom-to-top direction do not appear to be satisfactory. The disclosed signal processor for matching signal patterns and for dynamically time warping an unknown input signal with a reference input signal generates a measure of the correspondence between the input signals. In generating the correspondence measure, the processor includes an arrangement for controlling all processor cells on a predetermined diagonal of the array of cells. Thereby all cells coupled to the diagonal can operate in parallel to increase and improve the efficiency of the signal processor. The processor also includes an arrangement for controlling all processor cells on each diagonal of the array of cells. As a result, not only can all cells on each diagonal operate in parallel but also each of the plurality of diagonals can operate in parallel for processing the same or different sets of input signals. Thereby, a still further increase in the efficiency of the signal processor obtains.
摘要:
An improved CMOS pixel with a combination of analog and digital readouts to provide a large pixel dynamic range without compromising low-light performance using a comparator to test the value of an accumulated charge at a series of exponentially increasing exposure times. The test is used to stop the integration of photocurrent once the accumulated analog voltage has reached a predetermined threshold. A one-bit output value of the test is read out of the pixel (digitally) at each of the exponentially increasing exposure periods. At the end of the integration period, the analog value stored on the integration capacitor is read out using conventional CMOS active pixel readout circuits.
摘要:
In known speech recognition systems, processors and methods, utterances are analyzed to obtain a set of reference signals. An unknown signal may be compared with the reference signals. The unknown signal may be said to be the reference signal with which it most closely corresponds as defined by some correspondence measure. Known signal recognition arrangements using multiple processor cells tend to be expensive, in part because they tend to use many processor cells.The disclosed system, processor and method contemplate an arrangement including an array of processor cells for time warping an unknown signal having m elements with respect to a reference signal having n elements or vice versa. The cells, responsive to control signals on a control diagonal, generate the correspondence measure. As the signals propagate through the array, the instant arrangement recirculates signals from cells near one (or first) periphery of the arrangement, e.g., from the right periphery, to cells near another (or second) periphery, e.g., to the left periphery. As a result, rather than using m.times.n processor cells, the instant arrangement may use substantially less than m.times.n cells.