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    Time warp signal recognition processor using recirculating and/or reduced array of processor cells
    1.
    发明授权
    Time warp signal recognition processor using recirculating and/or reduced array of processor cells 失效
    时间扭曲信号识别处理器使用再循环和/或减少的处理器单元阵列

    公开(公告)号：US4509187A

    公开(公告)日：1985-04-02

    申请号：US388033

    申请日：1982-06-14

    申请人： Bryan D. Ackland ,  David J. Burr ,  Neil H. E. Weste

    发明人： Bryan D. Ackland ,  David J. Burr ,  Neil H. E. Weste

    IPC分类号： G10L15/00 ,  G10L15/12 ,  G06K9/64 ,  G10L1/00

    CPC分类号： G10L15/12 ,  G10L15/00

    摘要： In known speech recognition systems, processors and methods, utterances are analyzed to obtain a set of reference signals. An unknown signal may be compared with the reference signals. The unknown signal may be said to be the reference signal with which it most closely corresponds as defined by some correspondence measure. Known signal recognition arrangements using multiple processor cells tend to be expensive, in part because they tend to use many processor cells.The disclosed system, processor and method contemplate an arrangement including an array of processor cells for time warping an unknown signal having m elements with respect to a reference signal having n elements or vice versa. The cells, responsive to control signals on a control diagonal, generate the correspondence measure. As the signals propagate through the array, the instant arrangement recirculates signals from cells near one (or first) periphery of the arrangement, e.g., from the right periphery, to cells near another (or second) periphery, e.g., to the left periphery. As a result, rather than using m.times.n processor cells, the instant arrangement may use substantially less than m.times.n cells.

    摘要翻译： 在已知的语音识别系统中，处理器和方法，分析话语以获得一组参考信号。 可以将未知信号与参考信号进行比较。 未知信号可以被认为是由一些对应度量来定义的最接近对应的参考信号。 使用多个处理器单元的已知信号识别装置倾向于昂贵，部分原因是它们倾向于使用许多处理器单元。 所公开的系统，处理器和方法考虑了一种包括处理器单元阵列的布置，用于对具有n个元件的参考信号或反之亦然的时间扭曲具有m个元件的未知信号。 响应控制对角线上的控制信号的单元产生对应度量。 随着信号传播通过阵列，本装置将信号从布置的一个（或第一）周边（例如从右边周边）再循环到靠近另一个（或第二）周边的单元，例如到左边缘。 因此，不是使用mxn处理器单元，本发明可以使用基本上小于m×n个单元。

    Time warp signal recognition processor for matching signal patterns
    2.
    发明授权
    Time warp signal recognition processor for matching signal patterns 失效
    时间扭转信号识别处理器，用于匹配信号模式

    公开(公告)号：US4384273A

    公开(公告)日：1983-05-17

    申请号：US245952

    申请日：1981-03-20

    申请人： Bryan D. Ackland ,  David J. Burr ,  Neil H. E. Weste

    发明人： Bryan D. Ackland ,  David J. Burr ,  Neil H. E. Weste

    IPC分类号： G10L11/00 ,  G06K9/64 ,  G06T7/00 ,  G10L15/12 ,  G10L15/28 ,  G10L1/00

    CPC分类号： G06K9/6206 ,  G10L15/12

    摘要： Known signal processors for matching signal patterns commonly compare an unknown signal with one of a set of reference signals. Various comparison techniques are known. One comparison technique for solving a parenthesization problem includes an orthogonal array of interconnected cells which are adapted for dynamic programming and for extending data and control information in a generally left-to-right direction as well as in a bottom-to-top direction. For solving a pattern matching problem, known arrangements for extending control information in a generally left-to-right or bottom-to-top direction do not appear to be satisfactory. The disclosed signal processor for matching signal patterns and for dynamically time warping an unknown input signal with a reference input signal generates a measure of the correspondence between the input signals. In generating the correspondence measure, the processor includes an arrangement for controlling all processor cells on a predetermined diagonal of the array of cells. Thereby all cells coupled to the diagonal can operate in parallel to increase and improve the efficiency of the signal processor. The processor also includes an arrangement for controlling all processor cells on each diagonal of the array of cells. As a result, not only can all cells on each diagonal operate in parallel but also each of the plurality of diagonals can operate in parallel for processing the same or different sets of input signals. Thereby, a still further increase in the efficiency of the signal processor obtains.

    摘要翻译： 用于匹配信号模式的已知信号处理器通常将未知信号与一组参考信号之一进行比较。 已知各种比较技术。 用于解决括号化问题的一种比较技术包括互连单元的正交阵列，其适于用于动态编程并且用于在大致从左到右的方向以及从底部到顶部的方向上扩展数据和控制信息。 为了解决模式匹配问题，用于扩展从左到右或从上到下的方向的控制信息的已知布置似乎不令人满意。 所公开的用于匹配信号模式的信号处理器和用参考输入信号动态地对未知输入信号进行扭曲的时间产生输入信号之间的对应关系的度量。 在产生对应度量时，处理器包括用于控制单元阵列的预定对角线上的所有处理器单元的装置。 因此，耦合到对角线的所有单元可以并行操作以增加和提高信号处理器的效率。 处理器还包括用于控制单元阵列的每个对角线上的所有处理器单元的装置。 结果，不仅每个对角线上的所有单元均可并行操作，而且多个对角线中的每一个可以并行操作，以处理相同或不同的输入信号组。 从而，信号处理器的效率进一步提高。

    Random access memory system having high-speed serial data paths
    3.
    发明授权
    Random access memory system having high-speed serial data paths 失效
    具有高速串行数据路径的随机存取存储器系统

    公开(公告)号：US4412313A

    公开(公告)日：1983-10-25

    申请号：US226462

    申请日：1981-01-19

    申请人： Bryan D. Ackland ,  Neil H. E. Weste

    发明人： Bryan D. Ackland ,  Neil H. E. Weste

    IPC分类号： G11C11/34 ,  G11C7/10 ,  G11C8/04 ,  G11C11/401 ,  G11C11/417 ,  G11C7/00 ,  G11C8/00

    CPC分类号： G11C7/1093 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1075 ,  G11C7/1078 ,  G11C7/1087 ,  G11C8/04 ,  G11C2207/107

    摘要： To substantially increase the bandwidth of a random access memory (RAM), a shift register is disposed within the memory array such that the shift register lies parallel to the word lines and is connected to at least individual ones of the bit lines contained within the array. Separate high-speed serial input and output lines are provided by the shift register. These lines are in addition to and operate independently of the slower speed input and output lines normally provided by the RAM. Through this arrangement, a row of data can be transferred to and from the memory array at a rate substantially faster than the single-bit access rate of the RAM.

    摘要翻译： 为了大大增加随机存取存储器（RAM）的带宽，移位寄存器被布置在存储器阵列内，使得移位寄存器平行于字线并且连接到阵列中包含的至少单个位线 。 单独的高速串行输入和输出线由移位寄存器提供。 这些线路通常由RAM通常提供的较慢速度的输入和输出线路进行补充和操作。 通过这种布置，可以以比RAM的单位访问速率快得多的速率将一行数据传送到存储器阵列和从存储器阵列传送。