公开(公告)号：US06218731B1

公开(公告)日：2001-04-17

申请号：US09383835

申请日：1999-08-26

申请人： Chien-Ping Huang ,  Tzong-Dar Her ,  Kevin Chiang

发明人： Chien-Ping Huang ,  Tzong-Dar Her ,  Kevin Chiang

IPC分类号： H01L2348

CPC分类号： H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/06136 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/73215 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A tiny ball grid array package based on a substrate. The substrate has at least an insulation layer and two copper foils laminated together. A hole is formed near the center of the substrate. A second one of the copper foils is patterned into multiple conductive traces formed on a surface of the substrate, while a first one of the copper foils has a surface partly exposed. The first copper foil is coupled with the conductive traces by vias, meanwhile, the first copper foil is grounded to form a ground plane, so as to improve the electrically properties and the heat dissipation efficiency. Bonding pads are formed in one surface of a chip. This surface is thermal-conductively connected to the grounded level, and the bonding pads are located in the hole. The bonding pads are electrically connected to a near end of a conductive trace by a conductive wire, and solder balls are attached at a far end of the conductive trace. A molding material fills the hole and covers a surrounding area of the hole to protect the bonding pads, the conductive wire, and the conductive traces, so as to cover ajunction area of the chip and the ground plane.

摘要翻译： 基于基板的小型球栅阵列封装。 基板至少具有绝缘层和两个铜箔层压在一起。 在基板的中心附近形成有孔。 铜箔中的第二个被图案化成形成在基板的表面上的多个导电迹线，而铜箔中的第一个具有部分暴露的表面。 第一铜箔通过通孔与导电迹线耦合，同时第一铜箔接地以形成接地平面，从而提高电性能和散热效率。 接合焊盘形成在芯片的一个表面中。 该表面导热连接到接地层，焊盘位于孔中。 接合焊盘通过导线电连接到导电迹线的近端，并且焊球附着在导电迹线的远端。 成型材料填充孔并覆盖孔的周围区域以保护接合焊盘，导线和导电迹线，以便覆盖芯片和接地平面的接合区域。