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公开(公告)号:US20190088565A1
公开(公告)日:2019-03-21
申请号:US16196262
申请日:2018-11-20
发明人: Chan Yoo , Akshay Singh , Yi Xu , Liana Foster , Steven Eskildsen
IPC分类号: H01L23/31 , H01L23/00 , H01L25/065 , H01L23/48
CPC分类号: H01L23/3114 , H01L23/3128 , H01L23/481 , H01L24/19 , H01L24/20 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/05553 , H01L2224/05554 , H01L2224/32145 , H01L2224/32225 , H01L2224/45139 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45169 , H01L2224/48227 , H01L2224/4824 , H01L2224/48464 , H01L2224/49175 , H01L2224/73215 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06562 , H01L2225/06568 , H01L2924/15311 , H01L2924/181 , H01L2924/3862 , H01L2924/00012 , H01L2924/00014
摘要: A semiconductor die that includes a first die located on a first side of an interposer and a second die located on a second side of the interposer. Active sides of the first and second dies may each face the interposer. A bond wire may electrically connect the first die to the second side of the interposer and a bond wire may electrically connect the second die to the first side of the interposer. The bond wires may extend through a plurality of windows in the interposer. First and second dies may be attached to a first side of an interposer and may be electrically connected to a second side of the interposer through windows and third and fourth dies may be attached to a second side of the interposer and may be electrically connected to the first side of the interposer through windows.
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公开(公告)号:US20180331074A1
公开(公告)日:2018-11-15
申请号:US16037453
申请日:2018-07-17
申请人: Invensas Corporation
IPC分类号: H01L25/065 , G11C5/06 , G11C8/18 , H01L23/02 , H01L23/13 , H01L23/00 , H01L23/498 , H01L23/50 , G11C5/04 , H01L23/48
CPC分类号: H01L25/0657 , G11C5/04 , G11C5/063 , G11C5/066 , G11C8/18 , H01L23/02 , H01L23/13 , H01L23/48 , H01L23/49838 , H01L23/50 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0655 , H01L2224/16145 , H01L2224/16225 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45099 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/49113 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73265 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/0652 , H01L2225/06541 , H01L2225/06548 , H01L2225/06562 , H01L2225/06572 , H01L2225/06589 , H01L2225/107 , H01L2924/00014 , H01L2924/01322 , H01L2924/15311 , H01L2924/181 , H01L2924/18161 , H01L2924/3011 , H01L2924/00012 , H01L2924/00 , H01L2224/85
摘要: A microelectronic assembly can include a microelectronic package connected with a circuit panel. The package has a microelectronic element having a front face facing away from a substrate of the package, and electrically connected with the substrate through conductive structure extending above the front face. First terminals provided in first and second parallel grids or in first and second individual columns can be configured to carry address information usable to determine an addressable memory location from among all the available addressable memory locations of the memory storage array. The first terminals in the first grid can have signal assignments which are a mirror image of the signal assignments of the first terminals in the second grid.
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公开(公告)号:US10083903B1
公开(公告)日:2018-09-25
申请号:US15201575
申请日:2016-07-04
发明人: In Sang Yoon , DeokKyung Yang , Sungmin Song
IPC分类号: H01L23/52 , H01L23/498 , H01L23/31 , H01L21/48 , H01L21/56
CPC分类号: H01L23/49838 , H01L21/4853 , H01L21/565 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5385 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/05548 , H01L2224/05573 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/45147 , H01L2224/48227 , H01L2224/4824 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00014 , H01L2924/01047 , H01L2924/12042 , H01L2924/15311 , H01L2924/1815 , H01L2924/19107 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
摘要: A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.
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4.
公开(公告)号:US20180211896A1
公开(公告)日:2018-07-26
申请号:US15936715
申请日:2018-03-27
IPC分类号: H01L23/31 , H01L23/16 , H01L23/492 , H01L23/00 , H01L25/065 , H01L23/36
CPC分类号: H01L23/3128 , H01L23/16 , H01L23/36 , H01L23/4924 , H01L24/06 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L2224/0401 , H01L2224/04042 , H01L2224/06135 , H01L2224/06136 , H01L2224/16225 , H01L2224/274 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2224/83192 , H01L2224/838 , H01L2225/0651 , H01L2225/06575 , H01L2225/06589 , H01L2225/06593 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/12043 , H01L2924/14 , H01L2924/15311 , H01L2924/16235 , H01L2924/16788 , H01L2924/181 , H01L2924/351 , H01L2924/3512 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要: Packaged semiconductor components having substantially rigid support member are disclosed. The packages can include a semiconductor die and a support member proximate to the semiconductor die. The support member is at least substantially rigid. The packages can further include an adhesive between the support member and the semiconductor die and adhesively attaching the support member to the semiconductor die. The packages can also include a substrate carrying the semiconductor die and the support member attached to the semiconductor die.
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公开(公告)号:US10007622B2
公开(公告)日:2018-06-26
申请号:US15481288
申请日:2017-04-06
申请人: Invensas Corporation
发明人: Zhuowen Sun , Yong Chen
CPC分类号: G06F13/1673 , G06F12/00 , G06F12/0623 , G06F13/1694 , G11C5/04 , G11C5/06 , G11C8/06 , G11C8/12 , H01L2224/4824 , H01L2924/15311
摘要: A method for reducing load in a memory module. In such a method, a plurality of memory chips are coupled to a circuit platform. Each memory chip of the plurality of memory chips each has a plurality of memory dies. At least one controller is coupled to the circuit platform and further coupled to the plurality of memory chips for communication with the plurality of memory dies thereof. The at least one controller is for receiving chip select signals to provide a plurality of rank select signals in excess of the chip select signals. The plurality of memory dies are coupled with wire bonds within the plurality of memory chips for a reduced load for coupling the circuit platform for communicating via a memory channel. The load is sufficiently reduced for having at least two instances of the memory module share the memory channel.
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公开(公告)号:US09984995B1
公开(公告)日:2018-05-29
申请号:US15350099
申请日:2016-11-13
发明人: Po-Chun Lin
IPC分类号: H01L25/065 , H01L23/498 , H01L23/538 , H01L23/48 , H01L23/00 , H01L25/00
CPC分类号: H01L25/0652 , H01L23/481 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5383 , H01L23/5385 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/73 , H01L25/0655 , H01L25/50 , H01L2224/06181 , H01L2224/13025 , H01L2224/16145 , H01L2224/16146 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/17181 , H01L2224/32225 , H01L2224/4824 , H01L2224/73204 , H01L2224/73207 , H01L2224/73257 , H01L2224/92125 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06572 , H01L2924/00014 , H01L2924/15311 , H01L2224/45099 , H01L2924/00
摘要: A semiconductor package includes a package substrate, a first semiconductor chip, a second semiconductor chip, and a top interposer. The first semiconductor chip and the second semiconductor chip are disposed on the package substrate. The top interposer is electrically connected to the first semiconductor chip and the second semiconductor chip, and the first semiconductor chip and the second semiconductor chip are present between the package substrate and the top interposer.
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7.
公开(公告)号:US09876002B2
公开(公告)日:2018-01-23
申请号:US15419237
申请日:2017-01-30
申请人: Invensas Corporation
发明人: Terrence Caskey , Ilyas Mohammed
IPC分类号: H01L25/00 , H01L25/18 , H01L25/065 , H01L25/10 , H01L23/13 , H01L23/538 , H01L25/11 , H01L21/56 , H01L21/683 , H01L23/31 , H01L23/00 , H01L23/498 , H01L21/768
CPC分类号: H01L25/18 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L21/76802 , H01L21/76877 , H01L23/13 , H01L23/3107 , H01L23/3114 , H01L23/3185 , H01L23/49816 , H01L23/5389 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/16 , H01L24/19 , H01L24/20 , H01L24/29 , H01L24/32 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/96 , H01L25/0657 , H01L25/105 , H01L25/117 , H01L25/50 , H01L2224/0401 , H01L2224/04042 , H01L2224/04105 , H01L2224/05124 , H01L2224/05147 , H01L2224/05548 , H01L2224/05554 , H01L2224/05571 , H01L2224/05624 , H01L2224/05647 , H01L2224/06155 , H01L2224/12105 , H01L2224/13023 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13144 , H01L2224/1329 , H01L2224/133 , H01L2224/14131 , H01L2224/27334 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48108 , H01L2224/48145 , H01L2224/4824 , H01L2224/73207 , H01L2224/73215 , H01L2224/73217 , H01L2224/73265 , H01L2224/73267 , H01L2224/82031 , H01L2224/82039 , H01L2224/82047 , H01L2224/83005 , H01L2224/83192 , H01L2224/852 , H01L2224/92144 , H01L2224/92147 , H01L2225/06506 , H01L2225/0651 , H01L2225/06548 , H01L2225/06562 , H01L2225/06596 , H01L2225/1035 , H01L2225/1052 , H01L2225/1076 , H01L2225/1082 , H01L2924/00014 , H01L2924/0665 , H01L2924/12042 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/18162 , H01L2924/186 , H01L2924/00012 , H01L2924/00 , H01L2924/014 , H01L2224/05552
摘要: A microelectronic package may include a first microelectronic unit including a semiconductor chip having first chip contacts, an encapsulant contacting an edge of the semiconductor chip, and first unit contacts exposed at a surface of the encapsulant and electrically connected with the first chip contacts. The package may include a second microelectronic unit including a semiconductor chip having second chip contacts at a surface thereof, and an encapsulant contacting an edge of the chip of the second unit and having a surface extending away from the edge. The surfaces of the chip and the encapsulant of the second unit define a face of the second unit. Package terminals at the face may be electrically connected with the first unit contacts through bond wires electrically connected with the first unit contacts, and the second chip contacts through metallized vias and traces formed in contact with the second chip contacts.
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8.
公开(公告)号:US20170301598A1
公开(公告)日:2017-10-19
申请号:US15583826
申请日:2017-05-01
CPC分类号: H01L23/3128 , H01L21/561 , H01L23/49833 , H01L24/16 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/97 , H01L25/00 , H01L25/105 , H01L25/117 , H01L25/50 , H01L2224/0401 , H01L2224/05599 , H01L2224/06136 , H01L2224/16055 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/83 , H01L2224/85 , H01L2224/92147 , H01L2224/92247 , H01L2224/97 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2225/1088 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/0102 , H01L2924/01033 , H01L2924/01047 , H01L2924/01052 , H01L2924/0106 , H01L2924/01074 , H01L2924/01078 , H01L2924/14 , H01L2924/15184 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2924/30105 , H01L2924/00012 , H01L2924/00 , H01L2224/45099
摘要: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.
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公开(公告)号:US09761558B2
公开(公告)日:2017-09-12
申请号:US14718719
申请日:2015-05-21
申请人: Invensas Corporation
发明人: Ellis Chau , Reynaldo Co , Roseann Alatorre , Philip Damberg , Wei-Shun Wang , Se Young Yang
IPC分类号: H01L23/00 , H01L23/31 , H01L23/498 , H01L21/56 , H01L25/10 , H01L25/00 , H01L23/495 , H01L21/48 , H01L23/367 , H01L23/433 , H01L25/065 , H05K3/34
CPC分类号: H01L24/85 , H01L21/4853 , H01L21/56 , H01L21/565 , H01L23/3114 , H01L23/3128 , H01L23/3677 , H01L23/4334 , H01L23/49517 , H01L23/49811 , H01L23/49816 , H01L24/06 , H01L24/16 , H01L24/43 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/78 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/05599 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/4554 , H01L2224/45565 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/4824 , H01L2224/48245 , H01L2224/48247 , H01L2224/48997 , H01L2224/49171 , H01L2224/73204 , H01L2224/73207 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/78301 , H01L2224/851 , H01L2224/8518 , H01L2224/85399 , H01L2224/85951 , H01L2224/85986 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06558 , H01L2225/06562 , H01L2225/06565 , H01L2225/06568 , H01L2225/1023 , H01L2225/1029 , H01L2225/1052 , H01L2225/1058 , H01L2225/1088 , H01L2225/1094 , H01L2924/00011 , H01L2924/00012 , H01L2924/00014 , H01L2924/01013 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01049 , H01L2924/12042 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/15331 , H01L2924/1715 , H01L2924/181 , H01L2924/1815 , H01L2924/19107 , H01L2924/3511 , H05K3/3436 , H05K2201/10515 , H05K2201/1053 , Y10T29/49149 , Y10T29/49151 , H01L2224/45664 , H01L2924/00 , H01L2924/014 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076
摘要: A microelectronic package includes a substrate having a first surface. A microelectronic element overlies the first surface. Electrically conductive elements are exposed at the first surface of the substrate, at least some of which are electrically connected to the microelectronic element. The package includes wire bonds having bases bonded to respective ones of the conductive elements and ends remote from the substrate and remote from the bases. The ends of the wire bonds are defined on tips of the wire bonds, and the wire bonds define respective first diameters between the bases and the tips thereof. The tips have at least one dimension that is smaller than the respective first diameters of the wire bonds. A dielectric encapsulation layer covers portions of the wire bonds, and unencapsulated portions of the wire bonds are defined by portions of the wire bonds, including the ends, are uncovered by the encapsulation layer.
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公开(公告)号:US09735076B2
公开(公告)日:2017-08-15
申请号:US15162647
申请日:2016-05-24
发明人: Yoon Man Lee , So Yoon Kim
IPC分类号: H01L21/00 , H01L23/29 , H01L23/34 , H01L21/56 , H01L23/544 , H01L23/00 , H01L23/31 , H01L23/13
CPC分类号: H01L23/295 , H01L21/56 , H01L23/13 , H01L23/3128 , H01L23/34 , H01L23/544 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L2223/54406 , H01L2223/54486 , H01L2224/32225 , H01L2224/3315 , H01L2224/48091 , H01L2224/48106 , H01L2224/48225 , H01L2224/4824 , H01L2224/73215 , H01L2224/83101 , H01L2224/92147 , H01L2924/00014 , H01L2924/01003 , H01L2924/01011 , H01L2924/01013 , H01L2924/01019 , H01L2924/0102 , H01L2924/01021 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01025 , H01L2924/01026 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01031 , H01L2924/01037 , H01L2924/01038 , H01L2924/01039 , H01L2924/0104 , H01L2924/01041 , H01L2924/01042 , H01L2924/01043 , H01L2924/01044 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01048 , H01L2924/01049 , H01L2924/0105 , H01L2924/01055 , H01L2924/01056 , H01L2924/01071 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01076 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/0108 , H01L2924/01081 , H01L2924/01082 , H01L2924/01087 , H01L2924/01088 , H01L2924/06 , H01L2924/0665 , H01L2924/15311 , H01L2924/181 , H01L2924/186 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/05599
摘要: An epoxy resin composition for encapsulating a semiconductor device and a semiconductor device encapsulated by the epoxy resin composition, the composition including a base resin; a filler; a colorant; and a thermochromic pigment, wherein a color of the thermochromic pigment is irreversibly changed when a temperature thereof exceeds a predetermined temperature.
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