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公开(公告)号:USD614747S1
公开(公告)日:2010-04-27
申请号:US29341797
申请日:2009-08-12
Applicant: Victor Hoernig , Chia Ying Lee
Designer: Victor Hoernig , Chia Ying Lee
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公开(公告)号:USD602136S1
公开(公告)日:2009-10-13
申请号:US29296515
申请日:2007-10-23
Applicant: Chia Ying Lee , Victor Hoernig
Designer: Chia Ying Lee , Victor Hoernig
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公开(公告)号:USD594739S1
公开(公告)日:2009-06-23
申请号:US29303787
申请日:2008-02-18
Applicant: Chia Ying Lee
Designer: Chia Ying Lee
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公开(公告)号:US20090100591A1
公开(公告)日:2009-04-23
申请号:US11876791
申请日:2007-10-23
Applicant: Chia Ying Lee , Victor Hoernig
Inventor: Chia Ying Lee , Victor Hoernig
IPC: A47K3/022
Abstract: A utility tub is provided with a sink area having support surfaces for removably supporting a tray. The tray may hold items that are drying. In addition, the utility tub may be provided with an enlarged area for supporting other items, and various accessories such as a towel rack or towel pegs.
Abstract translation: 公用浴盆设置有具有用于可移除地支撑托盘的支撑表面的水槽区域。 托盘可能会保持正在干燥的物品。 此外,公用浴缸可以设置有用于支撑其他物品的扩大区域,以及诸如毛巾架或毛巾钉的各种附件。
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公开(公告)号:USD583445S1
公开(公告)日:2008-12-23
申请号:US29296514
申请日:2007-10-23
Applicant: Chia Ying Lee , Victor Hoernig
Designer: Chia Ying Lee , Victor Hoernig
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公开(公告)号:USD578779S1
公开(公告)日:2008-10-21
申请号:US29303782
申请日:2008-02-18
Applicant: Chia Ying Lee , James Leroy Daniels
Designer: Chia Ying Lee , James Leroy Daniels
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公开(公告)号:USD564857S1
公开(公告)日:2008-03-25
申请号:US29286156
申请日:2007-04-25
Applicant: Chia Ying Lee
Designer: Chia Ying Lee
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公开(公告)号:US08697537B2
公开(公告)日:2014-04-15
申请号:US13364119
申请日:2012-02-01
Applicant: Chia Ying Lee , Chih-Yuan Ting , Jyu-Horng Shieh
Inventor: Chia Ying Lee , Chih-Yuan Ting , Jyu-Horng Shieh
IPC: H01L21/76
CPC classification number: H01L21/0337 , H01L21/3086 , H01L21/31144 , H01L21/76224 , H01L21/76816
Abstract: A method that includes forming a masking element on a semiconductor substrate and overlying a defined space. A first feature and a second feature are each formed on the semiconductor substrate. The space interposes the first and second features and extends from a first end of the first feature to a first end of the second feature. A third feature is then formed adjacent and substantially parallel the first and second features. The third feature extends at least from the first end of the first feature to the first end of the second feature.
Abstract translation: 一种方法,其包括在半导体衬底上形成掩模元件并覆盖在限定的空间上。 第一特征和第二特征各自形成在半导体衬底上。 该空间插入第一和第二特征并且从第一特征的第一端延伸到第二特征的第一端。 然后,第三特征与第一和第二特征相邻并基本上平行。 第三特征至少从第一特征的第一端延伸到第二特征的第一端。
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公开(公告)号:US20130157462A1
公开(公告)日:2013-06-20
申请号:US13328680
申请日:2011-12-16
Applicant: Chia Ying Lee , Chih-Yuan Ting , Jyu-Horng Shieh , Minghsing Tsai , Syun-Ming Jang
Inventor: Chia Ying Lee , Chih-Yuan Ting , Jyu-Horng Shieh , Minghsing Tsai , Syun-Ming Jang
IPC: H01L21/28 , H01L21/302
CPC classification number: H01L21/3086 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32
Abstract: The present disclosure provides a method including providing a semiconductor substrate and forming a first layer and a second layer on the semiconductor substrate. The first layer is patterned to provide a first element, a second element, and a space interposing the first and second elements. Spacer elements are then formed on the sidewalls on the first and second elements of the first layer. Subsequently, the second layer is etched using the spacer elements and the first and second elements as a masking element.
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公开(公告)号:USD614746S1
公开(公告)日:2010-04-27
申请号:US29341795
申请日:2009-08-12
Applicant: Victor Hoernig , Chia Ying Lee
Designer: Victor Hoernig , Chia Ying Lee
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