摘要:
A bus arbiter that ensures high priority transfers complete and allows high-priority data transfers with specific latency requirements, such as 802.11 requirements, to be prioritized above data transfers with lower latency requirements. As an example, the arbiter closely manages all transactions and guarantees sufficient latencies by pre-empting lower-priority data transfers with higher priority data transfers. All devices on the bus are configured with a latency timer setting of zero or a non-zero value which guarantees required data transfer latencies are met which means that any device will terminate bus-master transfers quickly upon the bus grant signal being de-asserted. To ensure a transfer completes, bus grant for the priority transfer is asserted until entire data transfer completion is imminent, enabling transfers, such as high priority transfers, to complete uninterrupted.
摘要:
A switching interface comprising a switch having an input and a plurality of outputs, and a memory associated with the switch. The switch is adapted to receive a packet from the input, the packet to be forwarded to a destination device coupled to a one of the plurality of outputs. The switch is responsive to store the packet in the associated memory. The switch is further responsive to a signal from the destination device to forward the packet from the associated memory to the destination device through the one of the plurality of outputs. Optionally, the switching interface may further comprise a packet encryption engine coupled between the input and the associated memory. Typically, the output devices coupled to the plurality of outputs will each have its own separate encryption process; in these scenarios the encryption engine will have logic for determining the appropriate encryption for the output device.
摘要:
In an example embodiment, there is disclosed an apparatus comprising a first transmitter, a second transmitter, and logic coupled to the first transmitter and the second transmitter. The logic is operable to limit a time period the second transmitter is able to transmit while the first transmitter is transmitting.
摘要:
Described in example embodiments herein are techniques for implementing power savings in a wireless local area network (WLAN). In accordance with an example embodiment, a centralized controller can be employed to gather data about network activity and select access points to switch to power save mode. Optionally, the controller may designate certain access points to remain active so as to monitor for clients attempting to access the WLAN. An aspect of an example embodiment is that it allows the controller to configure and manage power consumption based on demands on the overall system. In an example embodiment, techniques for implementing power savings within individual hardware components, such as access points, are disclosed. An aspect of a technique described in an example embodiment is that it provides flexibility to balance power savings and performance.
摘要:
In an example embodiment, there is disclosed an apparatus comprising a first transmitter, a second transmitter, and logic coupled to the first transmitter and the second transmitter. The logic is operable to limit a time period the second transmitter is able to transmit while the first transmitter is transmitting.
摘要:
Described in example embodiments herein are techniques for implementing power savings in a wireless local area network (WLAN). In accordance with an example embodiment, a centralized controller can be employed to gather data about network activity and select access points to switch to power save mode. Optionally, the controller may designate certain access points to remain active so as to monitor for clients attempting to access the WLAN. An aspect of an example embodiment is that it allows the controller to configure and manage power consumption based on demands on the overall system. In an example embodiment, techniques for implementing power savings within individual hardware components, such as access points, are disclosed. An aspect of a technique described in an example embodiment is that it provides flexibility to balance power savings and performance.
摘要:
A bus arbiter that ensures high priority transfers complete and allows high-priority data transfers with specific latency requirements, such as 802.11 requirements, to be prioritized above data transfers with lower latency requirements. As an example, the arbiter closely manages all transactions and guarantees sufficient latencies by pre-empting lower-priority data transfers with higher priority data transfers. All devices on the bus are configured with a latency timer setting of zero or a non-zero value which guarantees required data transfer latencies are met which means that any device will terminate bus-master transfers quickly upon the bus grant signal being de-asserted. To ensure a transfer completes, bus grant for the priority transfer is asserted until entire data transfer completion is imminent, enabling transfers, such as high priority transfers, to complete uninterrupted.