公开(公告)号：US11863670B2

公开(公告)日：2024-01-02

申请号：US17601205

申请日：2020-04-04

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： Mark Evan Marson ,  Michael Hutter ,  Bart Stevens

IPC: G06F21/00 ,  H04L29/06 ,  H04L9/08 ,  H04L9/00 ,  H04L9/16

CPC classification number: H04L9/0891 ,  H04L9/003 ,  H04L9/16

Abstract: Disclosed are memory encryption systems and methods that rotate encryption keys for robust resistance against side-channel-analysis (SCA)-based attacks on communication paths between an encryption engine within a trust boundary and an external memory component. A key data structure has a plurality of keys that are used to encrypt a plurality of memory blocks in the external memory. The memory blocks encrypted with the oldest key of the key data structure are identified. Encrypted data is read from the identified memory blocks. The encrypted data is decrypted from the identified memory blocks. The data is then re-encrypted using the selected key that is newer than the oldest key, and re-written to the identified memory blocks.

公开(公告)号：US20210226775A1

公开(公告)日：2021-07-22

申请号：US17248495

申请日：2021-01-27

Applicant: Cryptography Research, Inc.

Inventor： Michael Hutter ,  Matthew Pond Baker

IPC: H04L9/06 ,  G09C1/00

Abstract: Disclosed is a method and a system to execute the method to perform a first hashing operation to compute a first hash value, store the first hash value in a plurality of output registers, store a second message in a plurality of input registers, perform a first iteration of a second hashing operation, with an input to the second hashing operation including the second message and the first hash value, determine that a first portion of the second message, stored in a first register of the plurality of input registers, has been processed in course of the second hashing operation, and move a first portion of the first hash value stored in a first register of the plurality of output registers to the first register of the plurality of input registers.

公开(公告)号：US10712385B2

公开(公告)日：2020-07-14

申请号：US15780009

申请日：2016-12-01

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： Michael Hutter ,  Matthew Pond Baker

IPC: G01R31/317 ,  G06F21/75 ,  H04L9/00 ,  G09C1/00 ,  G06F21/72 ,  G01R31/3177 ,  G06F21/55

Abstract: A first plurality of logic gates and a second plurality of logic gates may be associated with a symmetric configuration. A first output at a first value may be generated by the first plurality of logic gates based on a first portion of input signals. A second output may be generated by the second plurality of logic gates at the first value based on a second portion of the input signals. A subsequent first output at a particular value may be generated by the first plurality of logic gates based on a first portion of a second plurality of input signals and a subsequent second output maybe generated by the second plurality of logic gates based on a second portion of the second plurality of input signals. A value of the subsequent second output may be complementary to the particular value of the subsequent first output.

公开(公告)号：US10461925B2

公开(公告)日：2019-10-29

申请号：US15673284

申请日：2017-08-09

Applicant: Cryptography Research, Inc.

Inventor： Matthew Pond Baker ,  Elena Trichina ,  Jean-Michel Cioranesco ,  Michael Hutter

IPC: H04L9/06 ,  G06F21/60 ,  H04L9/00 ,  G06F21/55 ,  G06F21/75

Abstract: An integrated circuit may implement a masked substitution box that includes a counter that generates counter values. An input mask component may generate unmasked input values based on a combination of respective counter values and an input mask value. Furthermore, a substitution function component may receive the unmasked input values and may generate output values based on respective unmasked input values and a substitution function. An output mask component may generate masked output values based on a combination of respective output values and an output mask value. The masked output values may be stored at memory elements.

公开(公告)号：US20180212761A1

公开(公告)日：2018-07-26

申请号：US15856682

申请日：2017-12-28

Applicant: Cryptography Research, Inc.

Inventor： Begül Bilgin ,  Michael Hutter

IPC: H04L9/06 ,  H04L9/08

CPC classification number: H04L9/0631 ,  H04L9/0625 ,  H04L9/065 ,  H04L9/0861

Abstract: Systems and methods for efficient computation of stream ciphers. An example system for implementing a stream cipher, may comprise: a sub-round computation circuit of a first type configured to perform a subset of transformations of a cipher computation round on a round input state, each transformation of the subset of transformations including at least one of: a bitwise addition operation, a bitwise exclusive disjunction operation, or a bitwise rotation operation. The sub-round computation circuit of the first type may comprise: one or more of sub-round computation circuits of a second type, wherein each sub-round computation circuit of the second type is configured to perform the subset of transformations of the cipher computation round on a respective part of the round input state.

公开(公告)号：US12021969B2

公开(公告)日：2024-06-25

申请号：US17598189

申请日：2020-04-01

Applicant: Cryptography Research, Inc.

Inventor： Pascal Sasdrich ,  Begül Bilgin ,  Michael Hutter

IPC: H04L29/00 ,  H04L9/00 ,  H04L9/06

CPC classification number: H04L9/0631 ,  H04L9/003 ,  H04L2209/04 ,  H04L2209/125

Abstract: An input data may be received. A portion of a cryptographic operation may be performed with the received input data at a first function component. During the performance of the cryptographic operation at the first function component, a pre-charge operation may be performed at a second function component. Furthermore, the second function component may be used to perform another portion of the cryptographic operation with a result of the portion of the cryptographic operation performed at the first function component.

公开(公告)号：US20210406406A1

公开(公告)日：2021-12-30

申请号：US17290027

申请日：2019-10-28

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： Michael Hutter ,  Michael Tunstall

IPC: G06F21/72 ,  G06F7/575 ,  G06F21/75 ,  H04L9/00

Abstract: A first arithmetic input share and a second arithmetic input share of an initial arithmetically-masked cryptographic value are received. A sequence of operations using the arithmetic input shares and a randomly generated number is performed, where a current operation in the sequence of operations generates a corresponding intermediate value that is used in a subsequent operation. At the end of the sequence of operations, a first Boolean output share and a second Boolean output share are generated. The arithmetic-to-Boolean mask conversion is independent of the input bit length.

公开(公告)号：US11101981B2

公开(公告)日：2021-08-24

申请号：US16444758

申请日：2019-06-18

Applicant: Cryptography Research, Inc.

Inventor： Pankaj Rohatgi ,  Elke De Mulder ,  Michael Hutter

IPC: H04L29/06 ,  G06F21/00 ,  H04L9/06 ,  H04L9/08 ,  H04L9/00

Abstract: Share values for use in a cryptographic operation may be received and the cryptographic operation may be performed based on the share values. A pseudorandom number that is to be used by the cryptographic operation may be identified and the pseudorandom number may be generated based on a portion of the share values that are used in the cryptographic operation. The cryptographic operation may then be performed based on the generated pseudorandom number.

公开(公告)号：US10333699B1

公开(公告)日：2019-06-25

申请号：US15206136

申请日：2016-07-08

Applicant: Cryptography Research, Inc.

Inventor： Pankaj Rohatgi ,  Elke De Mulder ,  Michael Hutter

IPC: H04L29/06 ,  G06F21/00 ,  H04L9/06 ,  H04L9/08

Abstract: Share values for use in a cryptographic operation may be received and the cryptographic operation may be performed based on the share values. A pseudorandom number that is to be used by the cryptographic operation may be identified and the pseudorandom number may be generated based on a portion of the share values that are used in the cryptographic operation. The cryptographic operation may then be performed based on the generated pseudorandom number.

公开(公告)号：US20190050204A1

公开(公告)日：2019-02-14

申请号：US16080147

申请日：2017-03-03

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： Michael Hutter ,  Michael Tunstall

IPC: G06F7/76 ,  G06F7/58 ,  G06F21/72 ,  H04L9/14 ,  H04L9/06 ,  H04L9/30

Abstract: A first input share value, a second input share value, and a third input share value may be received. The first input share value may be converted to a summation or subtraction between an input value and a combination of the second input share value and the third input share value. A random number value may be generated and combined with the second input share value and the third input share value to generate a combined value. Furthermore, a first output share value may be generated based on a combination of the converted first input share value, the combined value, and additional random number values.