公开(公告)号：US11983280B2

公开(公告)日：2024-05-14

申请号：US17309937

申请日：2020-01-06

Applicant: Cryptography Research, Inc.

Inventor： Michael Alexander Hamburg ,  Michael Tunstall ,  Michael Hutter

IPC: G06F21/00 ,  G06F7/523 ,  G06F7/58 ,  G06F17/16 ,  G06F21/60 ,  G06F21/78

CPC classification number: G06F21/602 ,  G06F7/523 ,  G06F7/588 ,  G06F17/16 ,  G06F21/78

Abstract: Aspects of the present disclosure involve a method and a system to support execution of the method to perform a cryptographic operation involving a first vector and a second vector, by projectively scaling the first vector, performing a first operation involving the scaled first vector and the second vector to obtain a third vector, generating a random number, storing the third vector in a first location, responsive to the random number having a first value, or in a second location, responsive to the random number having a second value, and performing a second operation involving a first input and a second input, wherein, based on the random number having the first value or the second value, the first input is the third vector stored in the first location or the second location and the second input is a fourth vector stored in the second location or the first location.

公开(公告)号：US20210173618A1

公开(公告)日：2021-06-10

申请号：US17124374

申请日：2020-12-16

Applicant: Cryptography Research, Inc.

Inventor： Michael Hutter ,  Michael Tunstall

IPC: G06F7/76 ,  G06F7/58 ,  G09C1/00 ,  H04L9/14 ,  G06F21/72 ,  H04L9/30 ,  G06F7/00 ,  H04L9/00 ,  H04L9/06

Abstract: A first input share value, a second input share value, and a third input share value may be received. The first input share value may be converted to a summation or subtraction between an input value and a combination of the second input share value and the third input share value. A random number value may be generated and combined with the second input share value and the third input share value to generate a combined value. Furthermore, a first output share value may be generated based on a combination of the converted first input share value, the combined value, and additional random number values.

公开(公告)号：US20200067695A1

公开(公告)日：2020-02-27

申请号：US16666017

申请日：2019-10-28

Applicant: Cryptography Research, Inc.

Inventor： Matthew Pond Baker ,  Elena Trichina ,  Jean-Michel Cioranesco ,  Michael Hutter

IPC: H04L9/06 ,  H04L9/00 ,  G06F21/60 ,  G06F21/75 ,  G06F21/55

Abstract: An integrated circuit may implement a masked substitution box that includes substitution function components, a decoder, and a logic component. Each of the substitution function components may receive a same input value and a different mask value and may generate a respective output mask value based on the same input value and respective different mask value The decoder may receive an input mask value and generate a decoded output value that is based on the received input mask value. The logic component may select one of the output mask values from one of the substitution function components based on the decoded output value.

公开(公告)号：US11353504B2

公开(公告)日：2022-06-07

申请号：US16913479

申请日：2020-06-26

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： Michael Hutter ,  Matthew Pond Baker

IPC: G01R31/317 ,  G06F21/75 ,  H04L9/00 ,  G09C1/00 ,  G06F21/72 ,  G01R31/3177 ,  G06F21/55

Abstract: A first plurality of logic gates and a second plurality of logic gates may be associated with a symmetric configuration. A first output at a first value may be generated by the first plurality of logic gates based on a first portion of input signals. A second output may be generated by the second plurality of logic gates at the first value based on a second portion of the input signals. A subsequent first output at a particular value may be generated by the first plurality of logic gates based on a first portion of a second plurality of input signals and a subsequent second output may be generated by the second plurality of logic gates based on a second portion of the second plurality of input signals. A value of the subsequent second output may be complementary to the particular value of the subsequent first output.

公开(公告)号：US20220075879A1

公开(公告)日：2022-03-10

申请号：US17309937

申请日：2020-01-06

Applicant: Cryptography Research, Inc.

Inventor： Michael Alexander Hamburg ,  Michael Tunstall ,  Michael Hutter

IPC: G06F21/60 ,  G06F21/78 ,  G06F17/16 ,  G06F7/58 ,  G06F7/523

Abstract: Aspects of the present disclosure involve a method and a system to support execution of the method to perform a cryptographic operation involving a first vector and a second vector, by projectively scaling the first vector, performing a first operation involving the scaled first vector and the second vector to obtain a third vector, generating a random number, storing the third vector in a first location, responsive to the random number having a first value, or in a second location, responsive to the random number having a second value, and performing a second operation involving a first input and a second input, wherein, based on the random number having the first value or the second value, the first input is the third vector stored in the first location or the second location and the second input is a fourth vector stored in the second location or the first location.

公开(公告)号：US11018849B2

公开(公告)日：2021-05-25

申请号：US16666017

申请日：2019-10-28

Applicant: Cryptography Research, Inc.

Inventor： Matthew Pond Baker ,  Elena Trichina ,  Jean-Michel Cioranesco ,  Michael Hutter

IPC: H04L9/06 ,  G06F21/55 ,  G06F21/75 ,  G06F21/60 ,  H04L9/00

Abstract: An integrated circuit may implement a masked substitution box that includes substitution function components, a decoder, and a logic component. Each of the substitution function components may receive a same input value and a different mask value and may generate a respective output mask value based on the same input value and respective different mask value The decoder may receive an input mask value and generate a decoded output value that is based on the received input mask value. The logic component may select one of the output mask values from one of the substitution function components based on the decoded output value.

公开(公告)号：US10454670B2

公开(公告)日：2019-10-22

申请号：US15603342

申请日：2017-05-23

Applicant: Cryptography Research, Inc.

Inventor： Michael Hutter ,  Matthew Pond Baker

IPC: G06F21/00 ,  H04L9/06 ,  G09C1/00

Abstract: A first hash value is calculated by using a first input value that is stored in a first set of registers. The first hash value is then stored in a second set of registers. A second input value is stored in the first set of registers after calculating the first hash value. The second hash value is calculated based on the first hash value and the second input value. During the calculating of the second hash value, the first hash value is shifted from the second set of registers to a portion of the first set of registers when the calculating of the second hash value has reached a state where the portion of the first set of registers is no longer used to store the second input value.

公开(公告)号：US20180062830A1

公开(公告)日：2018-03-01

申请号：US15673284

申请日：2017-08-09

Applicant: Cryptography Research, Inc.

Inventor： Matthew Pond Baker ,  Elena Trichina ,  Jean-Michel Cioranesco ,  Michael Hutter

IPC: H04L9/06 ,  G06F21/60 ,  H04L9/00

CPC classification number: H04L9/0631 ,  G06F21/556 ,  G06F21/602 ,  G06F21/755 ,  H04L9/003 ,  H04L9/0618 ,  H04L2209/12

Abstract: An integrated circuit may implement a masked substitution box that includes a counter that generates counter values. An input mask component may generate unmasked input values based on a combination of respective counter values and an input mask value. Furthermore, a substitution function component may receive the unmasked input values and may generate output values based on respective unmasked input values and a substitution function. An output mask component may generate masked output values based on a combination of respective output values and an output mask value. The masked output values may be stored at memory elements.

公开(公告)号：US20240396709A1

公开(公告)日：2024-11-28

申请号：US18670037

申请日：2024-05-21

Applicant: Cryptography Research, Inc.

Inventor： Pascal Sasdrich ,  Begül Bilgin ,  Michael Hutter

IPC: H04L9/06 ,  H04L9/00

Abstract: An input data may be received. A portion of a cryptographic operation may be performed with the received input data at a first function component. During the performance of the cryptographic operation at the first function component, a pre-charge operation may be performed at a second function component. Furthermore, the second function component may be used to perform another portion of the cryptographic operation with a result of the portion of the cryptographic operation performed at the first function component.

公开(公告)号：US11914870B2

公开(公告)日：2024-02-27

申请号：US17435360

申请日：2020-03-04

Applicant: CRYPTOGRAPHY RESEARCH, INC.

Inventor： Elke De Mulder ,  Michael Hutter ,  Samantha Gummalla

IPC: G06F3/06

CPC classification number: G06F3/0623 ,  G06F3/0655 ,  G06F3/0679

Abstract: Aspects of the present disclosure calculate masked data shares dynamically inside the CPU boundary, and use a plurality of memory channels to write the masked data shares to an external memory location and/or to read the data shares from that external memory location. Each dynamically generated mask value is uniquely associated with a corresponding memory channel during writing data to the external memory. The modified masked data is unmasked or remasked during a subsequent read operation.