公开(公告)号：US11409426B2

公开(公告)日：2022-08-09

申请号：US17182975

申请日：2021-02-23

Applicant: D-WAVE SYSTEMS INC.

Inventor： Murray C. Thom ,  Fiona L. Hanington ,  Alexander Condello ,  William W. Bernoudy ,  Melody C. Wong ,  Aidan P. Roy ,  Kelly T. R. Boothby ,  Edward D. Dahl

IPC: G06F3/048 ,  G06F3/04847 ,  G06N10/00 ,  G06T11/20 ,  G06F3/04817 ,  G06F16/901

Abstract: A user interface (UI), data structures and algorithms facilitate programming, analyzing, debugging, embedding, and/or modifying problems that are embedded or to be embedded on an analog processor (e.g., quantum processor), increasing computational efficiency and/or accuracy of problem solutions. The UI provides graph representations (e.g., source graph, target graph and correspondence therebetween) with nodes and edges which may map to hardware components (e.g., qubits, couplers) of the analog processor. Characteristics of solutions are advantageously represented spatially associated (e.g., overlaid or nested) with characteristics of a problem. Characteristics (e.g., bias state) may be represented by color, pattern, values, icons. Issues (e.g., broken chains) may be detected and alerts provided. Problem representations may be modified via the UI, and a computer system may autonomously generate new instances of the problem representation, update data structures, embed the new instance and cause the new instance to be executed by the analog processor.

公开(公告)号：US20240118797A1

公开(公告)日：2024-04-11

申请号：US18205379

申请日：2023-06-02

Applicant: D-WAVE SYSTEMS INC.

Inventor： Murray C. Thom ,  Fiona L. Hanington ,  Alexander Condello ,  William W. Bernoudy ,  Melody C. Wong ,  Aidan P. Roy ,  Kelly T. R. Boothby ,  Edward D. Dahl

IPC: G06F3/04847 ,  G06F3/04817 ,  G06F16/901 ,  G06N10/00 ,  G06T11/20

CPC classification number: G06F3/04847 ,  G06F3/04817 ,  G06F16/9024 ,  G06N10/00 ,  G06T11/206 ,  G06T2200/24

Abstract: A user interface (UI), data structures and algorithms facilitate programming, analyzing, debugging, embedding, and/or modifying problems that are embedded or to be embedded on an analog processor (e.g., quantum processor), increasing computational efficiency and/or accuracy of problem solutions. The UI provides graph representations (e.g., source graph, target graph and correspondence therebetween) with nodes and edges which may map to hardware components (e.g., qubits, couplers) of the analog processor. Characteristics of solutions are advantageously represented spatially associated (e.g., overlaid or nested) with characteristics of a problem. Characteristics (e.g., bias state) may be represented by color, pattern, values, icons. Issues (e.g., broken chains) may be detected and alerts provided. Problem representations may be modified via the UI, and a computer system may autonomously generate new instances of the problem representation, update data structures, embed the new instance and cause the new instance to be executed by the analog processor.

公开(公告)号：US11704012B2

公开(公告)日：2023-07-18

申请号：US17855095

申请日：2022-06-30

Applicant: D-WAVE SYSTEMS INC.

Inventor： Murray C. Thom ,  Fiona L. Hanington ,  Alexander Condello ,  William W. Bernoudy ,  Melody C. Wong ,  Aidan P. Roy ,  Kelly T. R. Boothby ,  Edward D. Dahl

IPC: G06F3/048 ,  G06F3/04847 ,  G06N10/00 ,  G06T11/20 ,  G06F3/04817 ,  G06F16/901

CPC classification number: G06F3/04847 ,  G06F3/04817 ,  G06F16/9024 ,  G06N10/00 ,  G06T11/206 ,  G06T2200/24

Abstract: A user interface (UI), data structures and algorithms facilitate programming, analyzing, debugging, embedding, and/or modifying problems that are embedded or to be embedded on an analog processor (e.g., quantum processor), increasing computational efficiency and/or accuracy of problem solutions. The UI provides graph representations (e.g., source graph, target graph and correspondence therebetween) with nodes and edges which may map to hardware components (e.g., qubits, couplers) of the analog processor. Characteristics of solutions are advantageously represented spatially associated (e.g., overlaid or nested) with characteristics of a problem. Characteristics (e.g., bias state) may be represented by color, pattern, values, icons. Issues (e.g., broken chains) may be detected and alerts provided. Problem representations may be modified via the UI, and a computer system may autonomously generate new instances of the problem representation, update data structures, embed the new instance and cause the new instance to be executed by the analog processor.

公开(公告)号：US11593695B2

公开(公告)日：2023-02-28

申请号：US16830650

申请日：2020-03-26

Applicant: D-WAVE SYSTEMS INC.

Inventor： William W. Bernoudy ,  Mohammad H. Amin ,  James A. King ,  Jeremy P. Hilton ,  Richard G. Harris ,  Andrew J. Berkley ,  Kelly T. R. Boothby

IPC: G06F17/00 ,  G06N10/00 ,  G06N10/60 ,  G06F15/16 ,  G06F17/10 ,  G06N10/40 ,  H03K19/00

Abstract: A hybrid computing system for solving a computational problem includes a digital processor, a quantum processor having qubits and coupling devices that together define a working graph of the quantum processor, and at least one nontransitory processor-readable medium communicatively coupleable to the digital processor which stores at least one of processor-executable instructions or data. The digital processor receives a computational problem, and programs the quantum processor with a first set of bias fields and a first set of coupling strengths. The quantum processor generates samples as potential solutions to an approximation of the problem. The digital processor updates the approximation by determining a second set of bias fields based at least in part on the first set of bias fields and a first set of mean fields that are based at least in part on the first set of samples and coupling strengths of one or more virtual coupling devices.

公开(公告)号：US11567779B2

公开(公告)日：2023-01-31

申请号：US16817210

申请日：2020-03-12

Applicant: D-WAVE SYSTEMS INC.

Inventor： William W. Bernoudy ,  James A. King ,  Andrew D. King

IPC: G06F9/44 ,  G06F9/38 ,  G06F9/48 ,  G06F3/06 ,  G06F9/50 ,  G06F30/20

Abstract: A highly parallelized parallel tempering technique for simulating dynamic systems, such as quantum processors, is provided. Replica exchange is facilitated by synchronizing grid-level memory. Particular implementations for simulating quantum processors by representing cells of qubits and couplers in grid-, block-, and thread-level memory are discussed. Parallel tempering of such dynamic systems can be assisted by modifying replicas based on isoenergetic cluster moves (ICMs). ICMs are generated via secondary replicas which are maintained alongside primary replicas and exchanged between blocks and/or generated dynamically by blocks without necessarily being exchanged. Certain refinements, such as exchanging energies and temperatures through grid-level memory, are also discussed.

公开(公告)号：US20200311591A1

公开(公告)日：2020-10-01

申请号：US16830650

申请日：2020-03-26

Applicant: D-WAVE SYSTEMS INC.

Inventor： William W. Bernoudy ,  Mohammad H. Amin ,  James A. King ,  Jeremy P. Hilton ,  Richard G. Harris ,  Andrew J. Berkley ,  Kelly T. R. Boothby

IPC: G06N10/00 ,  G06F17/18

Abstract: A hybrid computing system for solving a computational problem includes a digital processor, a quantum processor having qubits and coupling devices that together define a working graph of the quantum processor, and at least one nontransitory processor-readable medium communicatively coupleable to the digital processor which stores at least one of processor-executable instructions or data. The digital processor receives a computational problem, and programs the quantum processor with a first set of bias fields and a first set of coupling strengths. The quantum processor generates samples as potential solutions to an approximation of the problem. The digital processor updates the approximation by determining a second set of bias fields based at least in part on the first set of bias fields and a first set of mean fields that are based at least in part on the first set of samples and coupling strengths of one or more virtual coupling devices.

公开(公告)号：US20200257987A1

公开(公告)日：2020-08-13

申请号：US16785125

申请日：2020-02-07

Applicant: D-WAVE SYSTEMS INC.

Inventor： Catherine McGeoch ,  William W. Bernoudy

IPC: G06N5/00 ,  G06N10/00 ,  G06F17/18 ,  G06F15/163

Abstract: Hybrid quantum-classical approaches for solving computational problems in which results from a quantum processor are combined with an exact method executed on a classical processor are described. Quantum processors can generate candidate solutions to a combinatorial optimization problem, but since quantum processors can be probabilistic, they are unable to certify that a solution is an optimal solution. A hybrid quantum-classical exact solver addresses this problem by combining outputs from a quantum annealing processor with a classical exact algorithm that is modified to exploit properties of the quantum computation. The exact method executed on a classical processor can be a Branch and Bound algorithm. A Branch and Bound algorithm can be modified to exploit properties of quantum computation including a) the sampling of multiple low-energy solutions by a quantum processor, and b) the embedding of solutions in a regular structure such as a native hardware graph of a quantum processor.

公开(公告)号：US20200234172A1

公开(公告)日：2020-07-23

申请号：US16741208

申请日：2020-01-13

Applicant: D-WAVE SYSTEMS INC.

Inventor： James A. King ,  William W. Bernoudy ,  Kelly T. R. Boothby ,  Pau Farré Pérez

IPC: G06N10/00 ,  G06K9/62 ,  G06F17/18

Abstract: Systems and methods are described for operating a hybrid computing system using cluster contraction for converting large, dense input to reduced input that can be easily mapped into a quantum processor. The reduced input represents the global structure of the problem. Techniques involve partitioning the input variables into clusters and contracting each cluster. The input variables can be partitioned using an Unweighted Pair Group Method with Arithmetic Mean algorithm. The quantum processor returns samples based on the reduced input and the samples are expanded to correspond to the original input.