公开(公告)号：US08847636B2

公开(公告)日：2014-09-30

申请号：US13443209

申请日：2012-04-10

申请人： Michael K. Kerr ,  William F. Lawson

发明人： Michael K. Kerr ,  William F. Lawson

IPC分类号： H03B1/00 ,  H03K3/00 ,  H03K5/12 ,  H03L5/00

CPC分类号： G06F17/5063 ,  G06F2217/78 ,  H03K19/00315

摘要： A method and circuit for implementing protection for complementary metal oxide semiconductor (CMOS) output drivers, and a design structure on which the subject circuit resides are provided. An output driver stage transistor stack includes a plurality of series connected PFETs series connected with a plurality of series connected NFETs connected between upper and lower voltage supply rails. A pair of offset DC voltage levels provides respective gate voltages of an intermediate PFET and an intermediate NFET in the output driver stage transistor stack. A pair of pre-driver circuits receiving voltage level translated logic signals drive respective gate inputs of the upper PFET and the lower NFET in the output driver stage transistor stack. A voltage feedback circuit provides respective gate voltages of the PFET and NFET connected together in the output driver stage transistor stack.

摘要翻译： 一种用于实现互补金属氧化物半导体（CMOS）输出驱动器的保护的方法和电路，以及设置有该电路所在的设计结构。 输出驱动器级晶体管堆叠包括多个串联连接的PFET，其串联连接在连接在上部和下部电压供应轨道之间的多个串联连接的NFET。 一对偏移DC电压电平在输出驱动级晶体管堆叠中提供中间PFET和中间NFET的相应栅极电压。 接收电压电平转换逻辑信号的一对预驱动器电路驱动输出驱动级晶体管堆叠中的上PFET和下NFET的相应栅极输入。 电压反馈电路提供在输出驱动级晶体管堆叠中连接在一起的PFET和NFET的相应栅极电压。

公开(公告)号：US20130265091A1

公开(公告)日：2013-10-10

申请号：US13443183

申请日：2012-04-10

申请人： Michael K. Kerr ,  William F. Lawson

发明人： Michael K. Kerr ,  William F. Lawson

IPC分类号： H03K3/017

CPC分类号： H03K19/018528

摘要： A method and circuit for implementing low duty cycle distortion and low power differential to single ended level shifter, and a design structure on which the subject circuit resides are provided. The circuit includes an input differential amplifier providing positive and negative differential amplifier output signals coupled to an output amplifier providing a single ended output signal. The output amplifier amplifies and inverts the negative differential amplifier output signal. The output amplifier amplifies and superimposes the positive differential amplifier output signal with the amplified and inverted negative differential amplifier output signal, providing the single ended output signal with low duty cycle distortion.

摘要翻译： 一种用于实现低占空比失真和低功率差分到单端电平移位器的方法和电路，以及设置有目标电路所在的设计结构。 该电路包括输入差分放大器，其提供耦合到提供单端输出信号的输出放大器的正和负差分放大器输出信号。 输出放大器放大并反相负差分放大器输出信号。 输出放大器放大并叠加正差分放大器输出信号与放大和反相负差分放大器输出信号，提供具有低占空比失真的单端输出信号。

公开(公告)号：US06636821B2

公开(公告)日：2003-10-21

申请号：US09898252

申请日：2001-07-03

申请人： William F. Lawson

发明人： William F. Lawson

IPC分类号： H03K19003

CPC分类号： H03K19/0005

摘要： An output driver impedance calibration circuit which is used to make I/O (input/output) off chip driver characteristics, for a plurality of output driver circuits, alike on the same chip. The output impedance of an input/output driver circuit is calibrated by providing an external target impedance reference (it could be a multiple of the actual target output impedance), multiple devices in the output stage of the I/O driver circuit, a circuit to determine the value of the actual output impedance as compared with its target output impedance and a determination of when to stop the calibration process.

摘要翻译： 输出驱动器阻抗校准电路，用于对同一芯片上的多个输出驱动器电路进行I / O（输入/输出）芯片驱动器特性。 输入/输出驱动电路的输出阻抗通过提供外部目标阻抗参考（可能是实际目标输出阻抗的倍数），I / O驱动电路的输出级中的多个器件，电路 确定实际输出阻抗的值与其目标输出阻抗相比较，并确定何时停止校准过程。

公开(公告)号：US06262599B1

公开(公告)日：2001-07-17

申请号：US09544132

申请日：2000-04-06

申请人： Terry C. Coughlin, Jr. ,  William F. Lawson ,  Joseph M. Milewski

发明人： Terry C. Coughlin, Jr. ,  William F. Lawson ,  Joseph M. Milewski

IPC分类号： H03K190175

CPC分类号： H03K19/09429 ,  H03K19/018521

摘要： A low power CMOS bidirectional I/O buffer that translates low voltage core logic level signals into the higher voltage logic level signals. A first predrive stage is provided, comprising buffers (e.g., CMOS inverters) for tuning and balancing the circuit and the core signal combining circuit of a second predrive stage, thereby enabling IC designers to reduce the size of transistors in the level-shifting stage and providing more flexibility in the tuning of the predrive circuitry to synchronize or balance the logical transitions of the complementary transistors of the output driving stage. The invention provides a faster balanced level-shifting output buffer which enables higher frequency operation.

摘要翻译： 低功耗CMOS双向I / O缓冲器，可将低电压核心逻辑电平信号转换为较高电压逻辑电平信号。 提供了第一预驱动级，包括用于调谐和平衡第二预驱动级的电路和核心信号组合电路的缓冲器（例如，CMOS反相器），从而使得IC设计者能够在电平移位级中减小晶体管的尺寸， 在预调制电路的调谐中提供更大的灵活性以同步或平衡输出驱动级的互补晶体管的逻辑转换。 本发明提供了一种更快的平衡电平转换输出缓冲器，其实现更高频率的操作。