摘要:
Disclosed are an auto focus (AF) module and a photographing apparatus employing the same. The AF module may include an AF sensor having a plurality of AF pixels and a controller. The controller receives an information regarding the amount of light respectively received by the light receiving elements of one or more of the plurality of AF pixels from the one or more of the plurality of AF pixels. The controller of the AF sensor may be configured to control the operations, e.g., the light exposure timing, of the plurality of AF pixels based on the information received from the AF pixels.
摘要:
Disclosed are an auto focus (AF) module and a photographing apparatus employing the same. The AF module may include an AF sensor having a plurality of AF pixels and a controller. The controller receives an information regarding the amount of light respectively received by the light receiving elements of one or more of the plurality of AF pixels from the one or more of the plurality of AF pixels. The controller of the AF sensor may be configured to control the operations, e.g., the light exposure timing, of the plurality of AF pixels based on the information received from the AF pixels.
摘要:
A method for operating an image capture device having a sensor with an array of first and second pixels includes capturing an image a plurality of times with the second pixels to produce a corresponding second image signal, the second pixels being white pixels, capturing the image a single time with the first pixels to produce a corresponding first image signal, inputting selecting signals to the sensor via a row driver to obtain the first and second image signals from the first and second pixels, respectively, and converting the first and second image signals to respective digital values via an analog-to-digital converter.
摘要:
A time-interleaved bandpass delta-sigma modulator is developed which includes a first adder and a second adder and a comparator. An input signal is transmitted to the first adder according to the clock frequency of each channel block, and an n channel block output un of the first adder is transmitted to the first adder and the second adder of an n+2 channel block, and an n block output vn of the second adder is transmitted to the second adder of an n+2 block, and an output yn that passes through an n block comparator is transmitted to the first adder and the second adder of an n+2 block. Therefore, a modulator sequentially receives output from the comparator of each block for generating the final output y.
摘要翻译:开发了一种时间交织的带通Δ-Σ调制器,其包括第一加法器和第二加法器以及比较器。 根据每个通道块的时钟频率将输入信号发送到第一加法器,并且第一加法器的n个通道块输出u N n被发送到第一加法器,第二加法器 n + 2个通道块和第n个加法器的n个块输出端子n n n被发送到n + 2个块的第二加法器,并且输出y n n 通过n块比较器被传送到第n + 2块的第一加法器和第二加法器。 因此,调制器顺序地从每个块的比较器接收用于产生最终输出y的输出。
摘要:
A time-interleaved bandpass delta-sigma modulator is developed which includes a first adder and a second adder and a comparator. An input signal is transmitted to the first adder according to the clock frequency of each channel block, and an n channel block output un of the first adder is transmitted to the first adder and the second adder of an n+2 channel block, and an n block output vn of the second adder is transmitted to the second adder of an n+2 block, and an output yn that passes through an n block comparator is transmitted to the first adder and the second adder of an n+2 block. Therefore, a modulator sequentially receives output from the comparator of each block for generating the final output y.
摘要翻译:开发了一种时间交织的带通Δ-Σ调制器,其包括第一加法器和第二加法器以及比较器。 根据每个通道块的时钟频率将输入信号发送到第一加法器,并且第一加法器的n个通道块输出u N n被发送到第一加法器,第二加法器 n + 2个通道块和第n个加法器的n个块输出端子n n n被发送到n + 2个块的第二加法器,并且输出y n n 通过n块比较器被传送到第n + 2块的第一加法器和第二加法器。 因此,调制器顺序地从每个块的比较器接收用于产生最终输出y的输出。