Abstract:
A binary-to-decimal converter comprises a plurality of cascaded adding means having order numbers n 1,2,3... wherein the binary number is initially received by the adding means with order number 1 and proceeds serially through the adding means. The first adding means adding 1 to the binary number and each subsequent adding means multiplying the result from the previous adding means by Further means return the result from the last adding means to the input of the first adding means until such result is zero. For each such iteration certain bit positions of the result are stored, such bit positions representing the succession decimal digits of the conversion.
Abstract:
For a digital computer operating under a multilevel periodically occurring priority routine wherein information is transferable from a first field to a second field of a data store only during the lowest priority level, there is disclosed a method for updating information stored in the first field. The method contemplates preventing indiscriminate access to the first field. Instead, when during any level but the top priority level access is required to the first field for updating, the work being performed is interrupted and the computer switched to the top priority level. In this level, the updating information is simultaneously stored in corresponding locations of the first and second fields. Thereafter, the computer is restored to perform the interrupted work.
Abstract:
A computer system performs a jump instruction routine in a program of sequentially available addressed instructions. A jump instruction which includes an operator part and a variable part is stored in at a given address. When the jump instruction is performed the variable part is used to modify the present address of the jump instruction to establish a return address and also another address to indicate where a subroutine is stored.