Abstract:
An electronic selector for the exchange of PAM or PCM coded information without blocking is disclosed in which the number of outlets of the selector is equal to the number of inlets. Between each of the inlets and the outlets of the selector, an analog shift register is connected which for each pair of inlets and outlets comprises a first and a second stage. Each first stage is controlled by a selector inlet control unit which cyclically and sequentially activates the first stages, so that each PAM or PCM unit of information appearing on an inlet is stored in the first stage. The selector also contains a selector outlet control unit which, in dependence on a marker, cyclically activates a predetermined one of the second stages, so that the information stored in the first stage is transferred to the predetermined second stage and thereby to the desired outlet of the selector.
Abstract:
A method is disclosed for translations between a subscriber directory number consisting of a number of digits and a subscriber equipment number in a telecommunication equipment. There is a plurality of digit store cells for storing all possible digits which can occur in the different digit positions. The digit store cells with the lowest digit positions are directly associated to the subscriber equipment numbers. Address conversion cells each associated with a digit store cell contain a sum of two addresses, the address of a digit in the next higher digit position and the address of a digit in the next lower digit position. Upon translation in a first direction from the subscriber directory number to the subscriber equipment number a logical operation is carried out between the sum and the first address in order to obtain the address of the digit in the next lower digit position and upon translation in a second direction from the subscriber equipment number to the subscriber directory number a logical operation is carried out between the sum and the second address in order to obtain the address of the digit in the next higher digit position. Upon translation in the first direction a comparison of the digits in the first direction a comparison of the digits in the subscriber directory number is carried out with said digits in said digit store cells so as to find the address conversion cells and upon translation in the second direction a subscriber number digit is indicated which is found in the respective digit store cell whose address is obtained by the logical operation.
Abstract:
There is disclosed an arrangement in a stored program controlled telephone exchange for controlling devices emitting pulse series corresponding to dialed digits. The arrangement comprises a number of buffer units which are scanned, when a certain digit is to be emitted from a certain device, in order to determine either if there exists an idle unit from which the pulse series emitting device could be controlled or if there exists a unit in which there are a required number of control signals corresponding to the certain digit, in which latter case these signals are supplied to the device in question.
Abstract:
A circuit arrangement for indicating changes of state in one or several bistable elements, e.g. relays in the interval between two successive scannings of the elements. Each bistable element controls two make-and-break contacts, between which a capacitor is connected, a change of state of the element implying that the polarity of the appertaining capacitor is reversed. This reversing changes the state of an indication arrangement which is subject to the scannings, a change of state of the indication arrangement being recorded upon a scanning indicating that one or several bistable elements have changed their states.
Abstract:
The invention refers to a method of controlling jumps to different programs in a computer which works in real time. A number of programs associated with different priority levels are performed sequentially within subsequent primary intervals determined by a clock register. The programs associated with the different priority levels have to be addressed in periodically recurrent intervals of different length. After having performed a program a sum value is formed by addition of the contents of the clock register and a number corresponding to the number of subsequent primary intervals within which the addressing of the program has to be omitted. Within each primary interval the actual value of the clock register in priority order is compared with the sum values associated with the respective programs. If the value of the clock register upon comparison is found to have passed a sum value that one of the programs is addressed with which said sum value is associated.
Abstract:
A buffer store arrangement in a data controlled telecommunication system for delaying by a predetermined number of periods of a clock frequency the addressing of addresses separated by a restoration value. The arrangement comprises store cells with registering circuits and restoration circuits in the input side and reading circuits on the output side, a registering counter, a reading counter and a clock pulse generator. Each restoration circuit is connected to the clock pulse generator so that the restoration value is registered before the registering counter is activated. A data processor has an input register, which on its output is connectable to the registering circuits for registering data in a certain cell and to the registering counter for stepping at registering, and an output register. By setting the registering and reading counters so that they point out cells separated by a certain number of cells containing the restoration value, the desired delay is obtained which corresponds to the product of the clock pulse period and the said predetermined number of cells.
Abstract:
A process control computer scans test points arranged in groups to perform operations in accordance with changes in the states of the test points. The data store of the computer stores the states of the test points as words wherein each work represents a group of test points and the bits of the words represent the test points of the group. A flag resister of the data store comprises a group of bit cells with each bit cell being associated with one of the words. During the scan if the change of state of a test point changes, the associated bit in the data store is changed and the flange bit of the associated word is marked. Thereafter, the computer need only scan those words whose flag bits have been marked.
Abstract:
Apparatus for identifying those means of a plurality of means which have changed their binary state. A reference is sequentially obtained to only those means which have changed their state without spending unnecessary work sifting off the remaining means. The arrangement is particularly applicable in telecommunication systems, more especially such systems which have a central control, e.g., program store controlled systems in which the arrangement makes it possible to reduce considerably the idle load of a controlling computer.
Abstract:
In a computer-controlled system of cooperating devices for example a telecommunication system, the condition of each of the devices is indicated by a unit of binary information in a position in a first storage area in the data store, and the condition of a group of positions in the first storage area is indicated in a position in a second storage area, so that instead of for example scanning the positions in the first storage area to determine the condition of the corresponding device, a faster scan can be executed by scanning the positions in the second storage area.