Tester having an application specific electronics module, and systems and methods that incorporate or use the same
    11.
    发明授权
    Tester having an application specific electronics module, and systems and methods that incorporate or use the same 有权
    测试仪具有应用特定的电子模块,以及包含或使用它们的系统和方法

    公开(公告)号:US09557372B2

    公开(公告)日:2017-01-31

    申请号:US13882477

    申请日:2010-10-29

    IPC分类号: G01R31/28 G01R1/04

    摘要: In one embodiment, an automated test equipment (ATE) system includes a tester having a tester electronics module, an application specific electronics module, and a tester-to-device under test (DUT) interface mount. The tester electronics module has a first electronics interface configured to electrically connect to a tester-to-DUT interface when the tester-to-DUT interface is coupled to the tester-to-DUT interface mount. The application specific electronics module has a second electronics interface and a third electronics interface. The second and third electronics interfaces are configured to electrically connect to the tester-to-DUT interface when the tester-to-DUT interface is coupled to the tester-to-DUT interface mount. The application specific electronics module is configured to communicate with the tester electronics module via the second electronics interface, and with at least one DUT via the third electronics interface.

    摘要翻译: 在一个实施例中,自动测试设备(ATE)系统包括具有测试仪电子模块,应用特定电子模块以及被测试器件(DUT)接口安装件的测试器。 测试仪电子模块具有第一电子接口,其被配置为当测试器到DUT接口耦合到测试器到DUT接口安装时电连接到测试仪到DUT接口。 应用专用电子模块具有第二电子接口和第三电子接口。 第二和第三电子接口被配置为当测试器到DUT接口耦合到测试仪到DUT接口安装时电连接到测试仪到DUT接口。 应用专用电子模块被配置为经由第二电子接口与测试仪电子模块通信,并且经由第三电子接口与至少一个DUT进行通信。

    TESTER HAVING AN APPLICATION SPECIFIC ELECTRONICS MODULE, AND SYSTEMS AND METHODS THAT INCORPORATE OR USE THE SAME
    12.
    发明申请
    TESTER HAVING AN APPLICATION SPECIFIC ELECTRONICS MODULE, AND SYSTEMS AND METHODS THAT INCORPORATE OR USE THE SAME 有权
    具有应用特定电子模块的测试仪以及并入或使用它们的系统和方法

    公开(公告)号:US20140139251A1

    公开(公告)日:2014-05-22

    申请号:US13882477

    申请日:2010-10-29

    IPC分类号: G01R31/28 G01R1/04

    摘要: In one embodiment, an automated test equipment (ATE) system includes a tester having a tester electronics module, an application specific electronics module, and a tester-to-device under test (DUT) interface mount. The tester electronics module has a first electronics interface configured to electrically connect to a tester-to-DUT interface when the tester-to-DUT interface is coupled to the tester-to-DUT interface mount. The application specific electronics module has a second electronics interface and a third electronics interface. The second and third electronics interfaces are configured to electrically connect to the tester-to-DUT interface when the tester-to-DUT interface is coupled to the tester-to-DUT interface mount. The application specific electronics module is configured to communicate with the tester electronics module via the second electronics interface, and with at least one DUT via the third electronics interface.

    摘要翻译: 在一个实施例中,自动测试设备(ATE)系统包括具有测试仪电子模块,应用特定电子模块以及被测试器件(DUT)接口安装件的测试器。 测试仪电子模块具有第一电子接口,其被配置为当测试器到DUT接口耦合到测试器到DUT接口安装时电连接到测试仪到DUT接口。 应用专用电子模块具有第二电子接口和第三电子接口。 第二和第三电子接口被配置为当测试器到DUT接口耦合到测试仪到DUT接口安装时电连接到测试仪到DUT接口。 应用专用电子模块被配置为经由第二电子接口与测试仪电子模块通信,并且经由第三电子接口与至少一个DUT进行通信。

    Parallel test circuit with active devices
    13.
    发明授权
    Parallel test circuit with active devices 有权
    并联测试电路与有源器件

    公开(公告)号:US08384410B1

    公开(公告)日:2013-02-26

    申请号:US12035378

    申请日:2008-02-21

    IPC分类号: G01R31/02

    CPC分类号: G01R31/31926

    摘要: In accordance with one embodiment of the invention, a system is provided that comprises a first terminal for receiving an input testing signal during operation; a plurality of input/output terminals coupled with the first terminal; wherein the input/output terminals are configured to parallel output respective output testing signals during parallel output operation; wherein the input/output terminals are configured to parallel input testing response signals during parallel input operation from devices under test; and wherein each of the input/output terminals is electrically isolated during operation from the remaining plurality of input/output terminals.

    摘要翻译: 根据本发明的一个实施例,提供一种系统,其包括用于在操作期间接收输入测试信号的第一端子; 与第一终端耦合的多个输入/输出端子; 其中所述输入/输出端子被配置为在并行输出操作期间并行输出相应的输出测试信号; 其中所述输入/输出端子被配置为在来自被测器件的并行输入操作期间并行输入测试响应信号; 并且其中每个输入/输出端子在与剩余的多个输入/输出端子的操作期间电隔离。

    Memory tester tests multiple DUT's per test site
    14.
    发明授权
    Memory tester tests multiple DUT's per test site 有权
    内存测试仪测试每个测试站点的多个DUT

    公开(公告)号:US06671844B1

    公开(公告)日:2003-12-30

    申请号:US09677202

    申请日:2000-10-02

    IPC分类号: G01R3128

    摘要: A memory tester supports testing of multiple DUT's of the same type at a test site. The tester can be instructed to replicate the segments of the test vectors needed to test one DUT on the channels for the other DUT's. This produces patterns of transmit and receive vectors that are n-many DUT's wide. Conditional branching within the test program in response to conditions in the receive vectors (DUT failure) is supported by recognizing several types of error indications and an ability to selectively disable the testing of one or more DUT's while continuing to test the one or more that are not disabled. Also included are ways to remove or limit stimulus to particular DUT's, and ways to make all comparisons for a particular DUT appear to be “good.”

    摘要翻译: 内存测试器支持在测试站点测试同一类型的多个DUT。 可以指示测试仪复制在另一个DUT的通道上测试一个DUT所需的测试矢量段。 这产生了多个DUT宽的发送和接收向量的模式。 通过识别几种类型的错误指示和选择性地禁用一个或多个DUT的测试,同时继续测试一个或多个DUT的能力,支持测试程序内响应于接收向量(DUT故障)条件的条件分支 没有禁用 还包括删除或限制对特定DUT的刺激的方法,并且对特定DUT进行所有比较的方法似乎是“好”。