Methodology on developing metal fill as library device and design structure
    11.
    发明授权
    Methodology on developing metal fill as library device and design structure 有权
    开发金属填充作为库设备和设计结构的方法论

    公开(公告)号:US08640076B2

    公开(公告)日:2014-01-28

    申请号:US12906707

    申请日:2010-10-18

    申请人: Essam Mina Guoan Wang

    发明人: Essam Mina Guoan Wang

    IPC分类号: G06F17/50

    摘要: A methodology is provided on developing metal fill as a library device and, in particular, a method of generating a model of the effects (e.g., capacitance) of metal fills in an integrated circuit and a design structure. The method is implemented on a computing device and includes generating a model for effects of metal fill in an integrated circuit. The metal fill model is generated prior to completion of a layout design for the integrated circuit.

    摘要翻译: 提供了开发金属填充作为库装置的方法,特别是在集成电路和设计结构中产生金属填充物的效应(例如电容)的模型的方法。 该方法在计算设备上实现,并且包括生成用于集成电路中的金属填充效应的模型。 金属填充模型在完成集成电路的布局设计之前生成。

    Vertical coplanar waveguide with tunable characteristic impedance design structure and method of fabricating the same
    12.
    发明授权
    Vertical coplanar waveguide with tunable characteristic impedance design structure and method of fabricating the same 有权
    具有可调谐特性阻抗设计结构的垂直共面波导及其制造方法

    公开(公告)号:US08212634B2

    公开(公告)日:2012-07-03

    申请号:US12478385

    申请日:2009-06-04

    申请人: Essam Mina Guoan Wang

    发明人: Essam Mina Guoan Wang

    IPC分类号: H01P3/00 H01P3/18

    CPC分类号: H01P3/003 H01P3/085

    摘要: An on-chip vertical coplanar waveguide with tunable characteristic impedance, a design structure, and a method of making the same. An on-chip transmission line includes a signal line, an upper ground line spaced apart from and above the signal line, and a lower ground line spaced apart from and below the signal line. The signal line, the upper ground line and the lower ground line are substantially vertically aligned in a dielectric material.

    摘要翻译: 具有可调谐特性阻抗的片上垂直共面波导,设计结构及其制造方法。 片上传输线包括信号线,与信号线间隔开的上接地线以及与信号线间隔开的下接地线。 信号线,上地线和下接地线在电介质材料中基本垂直对准。

    Coplanar waveguide structures with alternating wide and narrow portions, method of manufacture and design structure
    13.
    发明授权
    Coplanar waveguide structures with alternating wide and narrow portions, method of manufacture and design structure 有权
    具有交替宽窄部分的共面波导结构,制造方法和设计结构

    公开(公告)号:US08766747B2

    公开(公告)日:2014-07-01

    申请号:US12752554

    申请日:2010-04-01

    申请人: Essam Mina Guoan Wang

    发明人: Essam Mina Guoan Wang

    IPC分类号: H01P3/08 H01P9/00

    CPC分类号: H01P3/081 H01P3/003 H01P9/00

    摘要: On-chip high performance slow-wave coplanar waveguide structures, method of manufacture and design structures for integrated circuits are provided herein. The structure includes at least one ground and a signal layer provided in a same plane as the at least one ground. The signal layer has at least one alternating wide portion and narrow portion. The wide portion extends toward the at least one ground.

    摘要翻译: 本文提供片上高性能慢波共面波导结构,集成电路的制造方法和设计结构。 该结构包括设置在与至少一个地面相同的平面中的至少一个地面和信号层。 信号层具有至少一个交替宽的部分和窄部分。 宽部分朝向至少一个地面延伸。

    High performance on-chip vertical coaxial cable, method of manufacture and design structure
    14.
    发明授权
    High performance on-chip vertical coaxial cable, method of manufacture and design structure 有权
    高性能片上垂直同轴电缆,制造方法和设计结构

    公开(公告)号:US08629536B2

    公开(公告)日:2014-01-14

    申请号:US13018963

    申请日:2011-02-01

    IPC分类号: H01L29/40

    摘要: A high performance on-chip vertical coaxial cable structure, method of manufacturing and design structure thereof is provided. The coaxial cable structure includes an inner conductor and an insulating material that coaxially surrounds the inner conductor. The structure further includes an outer conductor which surrounds the insulating material. Both the inner and outer conductors comprise a plurality of metal layers formed on different wiring levels and interconnected between the different wiring levels by conductors. The coaxial cable structure is formed upon a surface of a semiconductor substrate and is oriented in substantially perpendicular alignment with the surface.

    摘要翻译: 提供了一种高性能的片上垂直同轴电缆结构,其制造方法和设计结构。 同轴电缆结构包括同轴地围绕内导体的内导体和绝缘材料。 该结构还包括围绕绝缘材料的外导体。 内导体和外导体都包括形成在不同布线层上的多个金属层,并且通过导体在不同布线层之间互连。 同轴电缆结构形成在半导体衬底的表面上并且与表面基本上垂直对齐。

    Millimeter wave transmission line for slow phase velocity
    15.
    发明授权
    Millimeter wave transmission line for slow phase velocity 有权
    用于缓慢相速度的毫米波传输线

    公开(公告)号:US08299873B2

    公开(公告)日:2012-10-30

    申请号:US12342271

    申请日:2008-12-23

    申请人: Guoan Wang Essam Mina

    发明人: Guoan Wang Essam Mina

    IPC分类号: H01P3/08

    CPC分类号: H01P3/026 H01P1/184 H01P3/088

    摘要: A grounding plate and a transmission line are provided in a stack of dielectric material layers. First transmission line portions having a first width are alternately interlaced with second transmission line portions having a second width in the transmission line. The second width is greater than the first width so that inductance of the transmission line is increased relative to a transmission line having a fixed width. Metal fins may be provided between the grounding plate and the transmission line in the stack of the dielectric material layers. The metal fins may be grounded to the grounding plate to increase capacitance between the transmission line and the grounding plate. The increase in the inductance and the capacitance per unit length between the transmission line and the grounding plate is advantageously employed to provide a reduced phase velocity for electromagnetic signal transmitted through the transmission line. A design structure for the transmission line structure is provided.

    摘要翻译: 接地板和传输线设置在电介质材料层的堆叠中。 具有第一宽度的第一传输线部分与传输线中具有第二宽度的第二传输线部分交替交织。 第二宽度大于第一宽度,使得传输线的电感相对于具有固定宽度的传输线增加。 可以在接地板和介电材料层的叠层中的传输线之间设置金属翅片。 金属翅片可以接地到接地板,以增加传输线和接地板之间的电容。 传输线和接地板之间的电感和每单位长度的电容的增加有利地用于为通过传输线传输的电磁信号提供降低的相位速度。 提供了传输线结构的设计结构。

    T-CONNECTIONS, METHODOLOGY FOR DESIGNING T-CONNECTIONS, AND COMPACT MODELING OF T-CONNECTIONS
    16.
    发明申请
    T-CONNECTIONS, METHODOLOGY FOR DESIGNING T-CONNECTIONS, AND COMPACT MODELING OF T-CONNECTIONS 失效
    T型连接,T型连接方法和T型连接的紧凑型建模

    公开(公告)号:US20100276809A1

    公开(公告)日:2010-11-04

    申请号:US12431887

    申请日:2009-04-29

    摘要: T-connections, methodology for designing T-connections, and compact modeling of T-connections. The T-connections include an electrically conductive T-junction comprising a body and first, second and third integral arms projecting from mutually perpendicular sides of the body, each arm of the three integral arms having a same first width abutting the body and a same length extending away from the body; an electrically conductive step-junction comprising a first section having the first width and an integral and abutting second section having a second width, the second width different from the first width, the first section smoothly abutting and integral with the first arm of the T-junction; and wherein top surfaces of the T-junction and the step-junction are coplanar.

    摘要翻译: T型连接,T型连接的设计方法和T型连接的紧凑建模。 T形连接件包括一个导电T形接头,它包括主体和从本体的相互垂直的侧面突出的第一,第二和第三整体臂,三个整体臂的每个臂具有与主体相邻的相同的第一宽度和相同的长度 远离身体; 导电性阶梯结,其包括具有第一宽度的第一部分和具有第二宽度的整体和邻接的第二部分,所述第二宽度不同于所述第一宽度,所述第一部分平滑地抵接并与所述第二部分 交界处 并且其中T形结和台阶结的顶表面是共面的。

    Variable Impedance Single Pole Double Throw CMOS Switch
    17.
    发明申请
    Variable Impedance Single Pole Double Throw CMOS Switch 失效
    可变阻抗单极双掷CMOS开关

    公开(公告)号:US20120256678A1

    公开(公告)日:2012-10-11

    申请号:US13082434

    申请日:2011-04-08

    IPC分类号: H03K17/687

    摘要: A single pole double throw (SPDT) semiconductor switch includes a series connection of a first transmitter-side transistor and a first reception-side transistor between a transmitter node and a reception node. Each of the two first transistors is provided with a gate-side variable impedance circuit, which provides a variable impedance connection between a complementary pair of gate control signals. Further, the body of each first transistor can be connected to a body bias control signal through a body-side variable impedance circuit. In addition, the transmitter node is connected to electrical ground through a second transmitter-side transistor, and the reception node is connected to electrical ground through a second reception-side transistor. Each of the second transistors can have a body bias that is tied to the body bias control signals for the first transistors so that switched-off transistors provide enhanced electrical isolation.

    摘要翻译: 单极双掷(SPDT)半导体开关包括在发送器节点和接收节点之间的第一发送器侧晶体管和第一接收侧晶体管的串联连接。 两个第一晶体管中的每一个设置有栅极侧可变阻抗电路,其在互补的一对栅极控制信号之间提供可变阻抗连接。 此外,每个第一晶体管的主体可以通过体侧可变阻抗电路连接到体偏置控制信号。 此外,发射机节点通过第二发射机侧晶体管连接到电接地,并且接收节点通过第二接收侧晶体管连接到电接地。 每个第二晶体管可以具有连接到第一晶体管的体偏置控制信号的体偏置,使得关断晶体管提供增强的电隔离。

    MULTI BANDPASS SINGLE-INPUT SINGLE-OUTPUT RADIO FREQUENCY FILTERS
    18.
    发明申请
    MULTI BANDPASS SINGLE-INPUT SINGLE-OUTPUT RADIO FREQUENCY FILTERS 失效
    多单波段单输入单输出无线频率滤波器

    公开(公告)号:US20080136560A1

    公开(公告)日:2008-06-12

    申请号:US11609413

    申请日:2006-12-12

    IPC分类号: H03H7/01

    摘要: A multi-band band pass filter, including: first and second multi-order asynchronous resonators connected to each other by a coupling resonator and connected to respective first and second matching resonators, the first matching resonator connected to a signal-in terminal and second matching resonator connected to a signal-out terminal respectively; a first reference resonator connected between the signal-in terminal and a reference-in terminal and a second reference resonator connected between the signal-out terminal and a reference-out terminal, the first multi-order asynchronous resonator connected between the first matching resonator and the coupling resonator to the first reference terminal and the second multi-order asynchronous resonator connected between the second matching resonator and the coupling resonator to the reference-out terminal, the reference-in terminal connected to the reference-out terminal; and a feedback resonator connected between the signal-in terminal and the signal-out terminal.

    摘要翻译: 一种多频带通滤波器,包括:通过耦合谐振器彼此连接并连接到相应的第一和第二匹配谐振器的第一和第二多阶异步谐振器,第一匹配谐振器连接到信号输入端子和第二匹配 谐振器分别连接到信号输出端子; 连接在信号输入端子和参考端子之间的第一参考谐振器和连接在信号输出端子和参考输出端子之间的第二参考谐振器,第一多级异步谐振器连接在第一匹配谐振器和 连接到第一参考端的耦合谐振器和连接在第二匹配谐振器和耦合谐振器之间的第二多级异步谐振器连接到引出端,参考端连接到引出端; 以及连接在信号输入端子和信号输出端子之间的反馈谐振器。

    DETERMINING GEOMETRICAL CONFIGURATION OF INTERCONNECT STRUCTURE
    19.
    发明申请
    DETERMINING GEOMETRICAL CONFIGURATION OF INTERCONNECT STRUCTURE 失效
    确定互连结构的几何配置

    公开(公告)号:US20070298527A1

    公开(公告)日:2007-12-27

    申请号:US11426053

    申请日:2006-06-23

    IPC分类号: H01L21/66

    摘要: Methods are disclosed for determining a geometrical configuration of an interconnect structure of a test structure without cross-sectioning or optical measurements. In one embodiment, the method includes obtaining simulation data correlating capacitance data, resistance data and geometrical configuration data for a plurality of interconnect structures having different geometrical configurations; measuring a capacitance value and a resistance value from the interconnect structure of the test structure; and determining the geometrical configuration of the interconnect structure by comparing the capacitance value and the resistance value to the simulation data.

    摘要翻译: 公开了用于确定测试结构的互连结构的几何结构而不进行横截面或光学测量的方法。 在一个实施例中,该方法包括获得关于具有不同几何构造的多个互连结构的电容数据,电阻数据和几何配置数据相关联的模拟数据; 从测试结构的互连结构测量电容值和电阻值; 以及通过将电容值和电阻值与仿真数据进行比较来确定互连结构的几何结构。

    Variable impedance single pole double throw CMOS switch
    20.
    发明授权
    Variable impedance single pole double throw CMOS switch 失效
    可变阻抗单极双掷CMOS开关

    公开(公告)号:US08482336B2

    公开(公告)日:2013-07-09

    申请号:US13082434

    申请日:2011-04-08

    IPC分类号: H03K17/687

    摘要: A single pole double throw (SPDT) semiconductor switch includes a series connection of a first transmitter-side transistor and a first reception-side transistor between a transmitter node and a reception node. Each of the two first transistors is provided with a gate-side variable impedance circuit, which provides a variable impedance connection between a complementary pair of gate control signals. Further, the body of each first transistor can be connected to a body bias control signal through a body-side variable impedance circuit. In addition, the transmitter node is connected to electrical ground through a second transmitter-side transistor, and the reception node is connected to electrical ground through a second reception-side transistor. Each of the second transistors can have a body bias that is tied to the body bias control signals for the first transistors so that switched-off transistors provide enhanced electrical isolation.

    摘要翻译: 单极双掷(SPDT)半导体开关包括在发送器节点和接收节点之间的第一发送器侧晶体管和第一接收侧晶体管的串联连接。 两个第一晶体管中的每一个设置有栅极侧可变阻抗电路,其在互补的一对栅极控制信号之间提供可变阻抗连接。 此外,每个第一晶体管的主体可以通过体侧可变阻抗电路连接到体偏置控制信号。 此外,发射机节点通过第二发射机侧晶体管连接到电接地,并且接收节点通过第二接收侧晶体管连接到电接地。 每个第二晶体管可以具有连接到第一晶体管的体偏置控制信号的体偏置,使得关断晶体管提供增强的电隔离。