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    SEMICONDUCTOR STRUCTURE WITH ANTI-EFUSE DEVICE
    11.
    发明申请
    SEMICONDUCTOR STRUCTURE WITH ANTI-EFUSE DEVICE 有权

    公开(公告)号：US20170125361A1

    公开(公告)日：2017-05-04

    申请号：US14926880

    申请日：2015-10-29

    Applicant: GLOBALFOUNDRIES Inc.

    Inventor： Suraj K. PATIL ,  Min-hwa CHI ,  Ajey Poovannummoottil JACOB

    IPC: H01L23/62

    CPC classification number: H01L23/62 ,  H01L23/5252

    Abstract: A semiconductor structure includes a dielectric layer, a silicidable metal layer and an undoped filler material layer are used to create an anti-efuse device. The anti-efuse device may be situated in a dielectric layer of an interconnect structure for a semiconductor device or may be planar. Where part of an interconnect structure, the anti-efuse device may be realized by causing a current to flow therethrough while applying local heating. Where planar, the filler material may be situated between extensions of metal pads and metal atoms caused to move from the extensions to the filler material layer using a current flow and local heating.

    FINFET WITH ELECTRICALLY ISOLATED ACTIVE REGION ON BULK SEMICONDUCTOR SUBSTRATE AND METHOD OF FABRICATING SAME
    12.
    发明申请
    FINFET WITH ELECTRICALLY ISOLATED ACTIVE REGION ON BULK SEMICONDUCTOR SUBSTRATE AND METHOD OF FABRICATING SAME 有权
    在半导体基片上具有电分离的有源区的FINFET及其制造方法

    公开(公告)号：US20150021691A1

    公开(公告)日：2015-01-22

    申请号：US13945455

    申请日：2013-07-18

    Applicant: GLOBALFOUNDRIES INC.

    Inventor： Murat Kerem AKARVARDAR ,  Jody A. FRONHEISER ,  Ajey Poovannummoottil JACOB

    IPC: H01L29/78 ,  H01L29/66

    CPC classification number: H01L29/785 ,  H01L21/76224 ,  H01L29/66795

    Abstract: A semiconductor stack of a FinFET in fabrication includes a bulk silicon substrate, a selectively oxidizable sacrificial layer over the bulk substrate and an active silicon layer over the sacrificial layer. Fins are etched out of the stack of active layer, sacrificial layer and bulk silicon. A conformal oxide deposition is made to encapsulate the fins, for example, using a HARP deposition. Relying on the sacrificial layer having a comparatively much higher oxidation rate than the active layer or substrate, selective oxidization of the sacrificial layer is performed, for example, by annealing. The presence of the conformal oxide provides structural stability to the fins, and prevents fin tilting, during oxidation. Selective oxidation of the sacrificial layer provides electrical isolation of the top active silicon layer from the bulk silicon portion of the fin, resulting in an SOI-like structure. Further fabrication may then proceed to convert the active layer to the source, drain and channel of the FinFET. The oxidized sacrificial layer under the active channel prevents punch-through leakage in the final FinFET structure.

    Abstract translation: FinFET的半导体堆叠制造包括体硅衬底，在主体衬底上的可选择性氧化的牺牲层和牺牲层上的活性硅层。 翅片从有源层，牺牲层和体硅的堆叠中蚀刻出来。 制造保形氧化物沉积来封装散热片，例如使用HARP沉积。 依靠具有比有源层或衬底高得多的氧化速率的牺牲层，例如通过退火进行牺牲层的选择性氧化。 保形氧化物的存在为翅片提供结构稳定性，并防止在氧化过程中翅片的倾斜。 牺牲层的选择性氧化提供顶部有源硅层与散热片的体硅部分的电隔离，导致类SOI结构。 然后进一步制造可以将有源层转换成FinFET的源极，漏极和沟道。 有源通道下方的氧化牺牲层可防止最终的FinFET结构中的穿透泄漏。

    WAVEGUIDE ABSORBERS
    13.
    发明申请
    WAVEGUIDE ABSORBERS 有权

    公开(公告)号：US20210041628A1

    公开(公告)日：2021-02-11

    申请号：US16531819

    申请日：2019-08-05

    Applicant: GLOBALFOUNDRIES INC.

    Inventor： Yusheng BIAN ,  Bo PENG ,  Michal RAKOWSKI ,  Ajey Poovannummoottil JACOB

    IPC: G02B6/24

    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to Waveguide absorbers and methods of manufacture are provided. The waveguide structure includes a photonics component and a spirally configured waveguide absorber coupled to a node of the photonics component which reduces optical return loss.

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