公开(公告)号：US20160372582A1

公开(公告)日：2016-12-22

申请号：US14745704

申请日：2015-06-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Renata Camillo-Castillo ,  Hanyi Ding ,  Natalie B. Feilchenfeld ,  Vibhor Jain ,  Anthony K. Stamper

IPC: H01L29/73 ,  H01L29/10 ,  H01L29/08 ,  H01L29/66 ,  H01L29/732

CPC classification number: H01L29/0821 ,  H01L21/762 ,  H01L21/76283 ,  H01L29/0653 ,  H01L29/66234 ,  H01L29/66242 ,  H01L29/732 ,  H01L29/7371

Abstract: Methods for forming a device structure and device structures using a silicon-on-insulator substrate that includes a high-resistance handle wafer. A doped region is formed in the high-resistance handle wafer. A first trench is formed that extends through a device layer and a buried insulator layer of the silicon-on-insulator substrate to the high-resistance handle wafer. The doped region includes lateral extension of the doped region extending laterally of the first trench. A semiconductor layer is epitaxially grown within the first trench, and a device structure is formed using at least a portion of the semiconductor layer. A second trench is formed that extends through the device layer and the buried insulator layer to the lateral extension of the doped region, and a conductive plug is formed in the second trench. The doped region and the plug comprise a body contact.

Abstract translation: 使用包括高电阻处理晶片的绝缘体上硅衬底形成器件结构和器件结构的方法。 在高电阻处理晶片中形成掺杂区域。 形成第一沟槽，其延伸穿过绝缘体上硅衬底的器件层和掩埋绝缘体层到高电阻处理晶片。 掺杂区域包括在第一沟槽横向延伸的掺杂区域的横向延伸。 半导体层在第一沟槽内外延生长，并且使用半导体层的至少一部分形成器件结构。 形成第二沟槽，其延伸穿过器件层和掩埋绝缘体层到掺杂区域的横向延伸，并且在第二沟槽中形成导电插塞。 掺杂区域和插塞包括身体接触。