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公开(公告)号:US11239315B2
公开(公告)日:2022-02-01
申请号:US16780494
申请日:2020-02-03
Applicant: GLOBALFOUNDRIES U.S. INC.
Inventor: Shiv Kumar Mishra , Baofu Zhu , Arkadiusz Malinowski , Kaushikee Mishra
IPC: H01L29/06 , H01L21/26 , H01L29/78 , H01L29/10 , H01L29/66 , H01L21/266 , H01L21/74 , H01L21/762 , H01L21/265
Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to dual trench isolation structures and methods of manufacture. The structure includes: a doped well region in a substrate; a dual trench isolation region within the doped well region, the dual trench isolation region comprising a first isolation region of a first depth and a second isolation region of a second depth, different than the first depth; and a gate structure on the substrate and extending over a portion of the dual trench isolation region.
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公开(公告)号:US20210249508A1
公开(公告)日:2021-08-12
申请号:US17243832
申请日:2021-04-29
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Jiehui Shu , Baofu Zhu , Haiting Wang , Sipeng Gu
IPC: H01L29/08 , H01L27/092 , H01L21/8238 , H01L29/78 , H01L29/66
Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A gate structure is arranged over a channel region of a semiconductor body. A first source/drain region is coupled to a first portion of the semiconductor body, and a second source/drain region is located in a second portion the semiconductor body. The first source/drain region includes an epitaxial semiconductor layer containing a first concentration of a dopant. The second source/drain region contains a second concentration of the dopant. The channel region is positioned in the semiconductor body between the first source/drain region and the second source/drain region.
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公开(公告)号:US20210242344A1
公开(公告)日:2021-08-05
申请号:US16781236
申请日:2020-02-04
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Haiting Wang , Sipeng Gu , Jiehui Shu , Baofu Zhu
Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A gate structure extends over a channel region in a semiconductor body. The gate structure has a first side surface and a second side surface opposite the first side surface. A first source/drain region is positioned adjacent to the first side surface of the gate structure and a second source/drain region is positioned adjacent to the second side surface of the gate structure. The first source/drain region includes a first epitaxial semiconductor layer, and the second source/drain region includes a second epitaxial semiconductor layer. A first top surface of the first epitaxial semiconductor layer is positioned at a first distance from the channel region, a second top surface of the second epitaxial semiconductor layer is positioned at a second distance from the channel region, and the first distance is greater than the second distance.
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公开(公告)号:US20210242339A1
公开(公告)日:2021-08-05
申请号:US16776938
申请日:2020-01-30
Applicant: GLOBALFOUNDRIES U.S, Inc.
IPC: H01L29/78 , H01L29/08 , H01L21/8238
Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A gate structure extends over a semiconductor body, a first source/drain region includes an epitaxial semiconductor layer on a first portion of the semiconductor body, and a second source/drain region is positioned in a second portion of the semiconductor body. The gate structure includes a first sidewall and a second sidewall opposite the first sidewall, the first source/drain region is positioned adjacent to the first sidewall of the gate structure, and the second source/drain region is positioned adjacent to the second sidewall of the gate structure. The first source/drain region has a first width, and the second source/drain region has a second width that is greater than the first width.
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公开(公告)号:US11075268B2
公开(公告)日:2021-07-27
申请号:US16541600
申请日:2019-08-15
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Jiehui Shu , Baofu Zhu , Haiting Wang , Sipeng Gu
IPC: H01L29/08 , H01L29/66 , H01L27/092 , H01L21/8238 , H01L29/78
Abstract: Structures for a field-effect transistor and methods of forming a structure for a field-effect transistor. A gate structure is arranged over a channel region of a semiconductor body. A first source/drain region is coupled to a first portion of the semiconductor body, and a second source/drain region is located in a second portion the semiconductor body. The first source/drain region includes an epitaxial semiconductor layer containing a first concentration of a dopant. The second source/drain region contains a second concentration of the dopant. The channel region is positioned in the semiconductor body between the first source/drain region and the second source/drain region.
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16.
公开(公告)号:US20210118993A1
公开(公告)日:2021-04-22
申请号:US16655429
申请日:2019-10-17
Applicant: GLOBALFOUNDRIES U.S. Inc.
Inventor: Arkadiusz Malinowski , Baofu Zhu , Frank W. Mont , Julien Frougier , Ali Razavieh
Abstract: One illustrative transistor device disclosed herein includes a gate structure positioned above a semiconductor substrate and first and second overall epitaxial cavities formed in the semiconductor substrate on opposite sides of the gate structure. In one embodiment, each of the first and second overall epitaxial cavities includes a substantially vertically oriented upper epitaxial cavity and a lower epitaxial cavity, wherein the substantially vertically oriented upper epitaxial cavity extends from an upper surface of the semiconductor substrate to the lower epitaxial cavity. A lateral width of the lower epitaxial cavity is greater than a lateral width of the upper epitaxial cavity. The device also includes epitaxial semiconductor material positioned in each of the first and second overall epitaxial cavities.
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