公开(公告)号：US20230317130A1

公开(公告)日：2023-10-05

申请号：US17709525

申请日：2022-03-31

Applicant: GlobalFoundries U.S. Inc.

Inventor： Chandrahasa Reddy Dinnipati ,  Ramesh Raghavan ,  Bipul C. Paul

IPC: G11C11/16 ,  G11C7/06

CPC classification number: G11C11/1673 ,  G11C11/1675 ,  G11C11/1655 ,  G11C11/1657 ,  G11C7/06

Abstract: A structure includes an array of nonvolatile memory cells, wordlines and bitlines connected to the nonvolatile memory cells, sense amplifiers connected to the nonvolatile memory cells, and reference cells connected to the sense amplifiers. Each of the reference cells has a transistor connected to a variable resistor, one of the wordlines, a reference bitline separate from the bitlines, and the sense amplifiers.