RETRIEVAL OF ENCODED DATA SLICES AND ENCODED INSTRUCTION SLICES BY A COMPUTING DEVICE
    15.
    发明申请
    RETRIEVAL OF ENCODED DATA SLICES AND ENCODED INSTRUCTION SLICES BY A COMPUTING DEVICE 有权
    通过计算机设备检索编码数据和编码指令

    公开(公告)号:US20120226960A1

    公开(公告)日:2012-09-06

    申请号:US13372650

    申请日:2012-02-14

    IPC分类号: H03M13/05 G06F11/10

    摘要: A computing device includes a central processing unit (CPU) and a memory system module. The CPU includes a data dispersed storage error coding (DSEC) module operable to DSEC decode a set of encoded ingress data slices to recapture ingress data and DSEC encode egress data to produce a set of encoded egress data slices, an instruction DSEC module operable to DSEC decode a set of encoded instruction slices to recapture an instruction, and an arithmetic logic unit (ALU) operable to, execute the instruction on the ingress data and execute the instruction to produce the egress data. The memory system module is operable to coordinate retrieval of the set of encoded ingress data slices from memory, coordinate retrieval of the set of encoded instruction slices from the memory, and coordinate storage of the set of encoded egress data slices in the memory.

    摘要翻译: 计算设备包括中央处理单元(CPU)和存储器系统模块。 CPU包括数据分散存储错误编码(DSEC)模块,可操作以DSEC对一组编码的入口数据片段进行解码,以重新采集入口数据和DSEC编码出口数据以产生一组编码的出口数据片段,指令DSEC模块可操作以用于DSEC 解码一组编码指令片以重新获取指令;以及算术逻辑单元(ALU),可操作以执行关于入口数据的指令并执行产生出口数据的指令。 存储器系统模块可操作以协调从存储器检索编码入口数据片段的集合,协调从存储器检索编码指令片段集合,以及将编码出口数据片段集合存储在存储器中。

    Retrieval of encoded data slices and encoded instruction slices by a computing device
    17.
    发明授权
    Retrieval of encoded data slices and encoded instruction slices by a computing device 有权
    通过计算设备检索编码数据片和编码指令片

    公开(公告)号:US08910022B2

    公开(公告)日:2014-12-09

    申请号:US13372650

    申请日:2012-02-14

    摘要: A computing device includes a central processing unit (CPU) and a memory system module. The CPU includes a data dispersed storage error coding (DSEC) module operable to DSEC decode a set of encoded ingress data slices to recapture ingress data and DSEC encode egress data to produce a set of encoded egress data slices, an instruction DSEC module operable to DSEC decode a set of encoded instruction slices to recapture an instruction, and an arithmetic logic unit (ALU) operable to, execute the instruction on the ingress data and execute the instruction to produce the egress data. The memory system module is operable to coordinate retrieval of the set of encoded ingress data slices from memory, coordinate retrieval of the set of encoded instruction slices from the memory, and coordinate storage of the set of encoded egress data slices in the memory.

    摘要翻译: 计算设备包括中央处理单元(CPU)和存储器系统模块。 CPU包括数据分散存储错误编码(DSEC)模块,可操作以DSEC对一组编码的入口数据片段进行解码,以重新采集入口数据和DSEC编码出口数据以产生一组编码的出口数据片段,指令DSEC模块可操作以用于DSEC 解码一组编码指令片以重新获取指令;以及算术逻辑单元(ALU),可操作以执行关于入口数据的指令并执行产生出口数据的指令。 存储器系统模块可操作以协调从存储器检索编码入口数据片段的集合,协调从存储器检索编码指令片段集合,以及将编码出口数据片段集合存储在存储器中。