MULTIPLE DIGITAL DATA SEQUENCES FROM AN ARBITRARY DATA GENERATOR OF A PRINTHEAD ASSEMBLY
    12.
    发明申请
    MULTIPLE DIGITAL DATA SEQUENCES FROM AN ARBITRARY DATA GENERATOR OF A PRINTHEAD ASSEMBLY 有权
    来自于PRINTHEAD大会的仲裁数据发生器的多个数字数据序列

    公开(公告)号:US20170057224A1

    公开(公告)日:2017-03-02

    申请号:US15308055

    申请日:2014-05-30

    Abstract: In an example, a piezoelectric printhead assembly includes a micro-electro mechanical system (MEMS) die including a plurality of nozzles. An application-specific integrated circuit (ASIC) die is coupled to the MEMS die by a plurality of wire bonds, wherein each of the wire bonds corresponds to a respective nozzle of the plurality of nozzles. An arbitrary data generator (ADG) on the ASIC is to provide a digital data sequence, and a phase selector is to enable multiple data read operations of the ADG to generate multiple delayed digital data sequences.

    Abstract translation: 在一个示例中,压电打印头组件包括包括多个喷嘴的微机电系统(MEMS)模具。 专用集成电路(ASIC)管芯通过多个引线接合耦合到MEMS管芯,其中每个引线接合对应于多个喷嘴的相应喷嘴。 ASIC上的任意数据发生器(ADG)是提供数字数据序列,并且相位选择器是使得ADG的多个数据读取操作能够产生多个延迟的数字数据序列。

    Voltage regulator for low side switch gate control

    公开(公告)号:US10926535B2

    公开(公告)日:2021-02-23

    申请号:US16618940

    申请日:2017-07-12

    Abstract: A fluidic die may include a fluid actuator comprising an electrical resistor, a power node to supply electrical current to the resistor to drive the fluid actuator, a low side switch transistor connected to a ground node and having a gate to control the flow of electrical current through the resistor, a voltage regulator to receive electrical power from the power node and to output a predetermined voltage and a level shifter to control to output a low side switch transistor gate drive voltage using the predetermined voltage and based upon control signals to control the gate to control fluid displacement by the fluid actuator. The predetermined voltage is greater than a voltage of the control signals and is independent of a resistance of the ground node.

    Wide array printhead module
    16.
    发明授权

    公开(公告)号:US10046562B2

    公开(公告)日:2018-08-14

    申请号:US15518306

    申请日:2014-10-28

    Abstract: A wide array printhead module includes a plurality of printhead die, each of the printhead die includes a number of nozzles. The nozzles form a number of primitives. A nozzle firing heater is coupled to each of the nozzles. An application specific integrated circuit (ASIC) controls a number of activation pluses that activate the nozzle firing heaters for each of the nozzles associated with the primitives. The activation pulses are delayed between each of the primitives via internal delays and external delays to reduce peak power demands of the printhead die. The ASIC determines the internal delays within each printhead die.

Patent Agency Ranking