公开(公告)号：US08995333B2

公开(公告)日：2015-03-31

申请号：US12749214

申请日：2010-03-29

Applicant: Hans Georg Gruber ,  Richard Dominic Wietfeldt ,  George Chrisikos

Inventor： Hans Georg Gruber ,  Richard Dominic Wietfeldt ,  George Chrisikos

IPC: H04W52/02 ,  H04L12/417 ,  H04W72/12 ,  H04W88/06

CPC classification number: H04L12/417 ,  H04W72/1215 ,  H04W88/06

Abstract: Systems and methodologies are described herein that facilitate a synchronous bus architecture for multi-radio coexistence associated with a wireless device. As described herein, a system of buses operating in a synchronous manner, combined with optional on-chip and/or other supplemental buses, can be utilized to couple respective radios and/or other related endpoints to a coexistence management platform, thereby facilitating management of coexistence between multiple radios in a unified and scalable manner. As further described herein, communication between a coexistence manager and its respective managed endpoints can be facilitated through the use of a single bus or multiple buses (e.g., external buses, on-chip and/or other internal buses, etc.) that can operate concurrently and/or in an otherwise cooperative manner to facilitate expedited conveyance of radio event notifications and their corresponding responses.

Abstract translation: 本文描述了促进与无线设备相关联的多无线电共存的同步总线架构的系统和方法。 如本文所述，可以利用以同步方式操作的总线系统，与可选的片上和/或其他补充总线组合，将相应的无线电和/或其他相关端点耦合到共存管理平台，从而便于管理 多台无线电之间以统一和可扩展的方式共存。 如本文进一步所述，可以通过使用可以操作的单总线或多个总线（例如，外部总线，片上和/或其他内部总线等）来促进共存管理器及其相应的受管端点之间的通信 同时和/或以其他协作的方式促进无线电事件通知的快速传送及其相应的响应。

公开(公告)号：US08667193B2

公开(公告)日：2014-03-04

申请号：US13281329

申请日：2011-10-25

Applicant: Hans Georg Gruber ,  Julio Arceo ,  Magesh Hariharan ,  Suren Mohan ,  Mark A. Landguth

Inventor： Hans Georg Gruber ,  Julio Arceo ,  Magesh Hariharan ,  Suren Mohan ,  Mark A. Landguth

IPC: G06F13/42

CPC classification number: G06F13/4291

Abstract: Techniques are disclosed for utilizing a non-ported generic device (NGD) or other non-ported hardware to couple processing device(s) to access components on a serial data bus without the need for integrated manager hardware. Using the NGD, a processing device(s) can utilize available unused bandwidth on the serial data bus to communicate with components coupled with the serial data bus, including a processing device having the manager hardware. Various alterations and embodiments are disclosed.

Abstract translation: 公开了利用非移植通用设备（NGD）或其他非端口硬件将处理设备耦合到访问串行数据总线上的组件而不需要集成管理器硬件的技术。 使用NGD，处理设备可以利用串行数据总线上的可用未使用的带宽与与串行数据总线耦合的组件进行通信，包括具有管理器硬件的处理设备。 公开了各种改变和实施例。

公开(公告)号：US20130100949A1

公开(公告)日：2013-04-25

申请号：US13281034

申请日：2011-10-25

Applicant: Hans Georg Gruber ,  Philip M. Clovis

Inventor： Hans Georg Gruber ,  Philip M. Clovis

IPC: H04J3/06

CPC classification number: H04L25/14 ,  H04L1/0071

Abstract: An apparatus including dual physical layer transceivers for high speed synchronous interface (HSI) frame interleaving. The apparatus includes a first physical layer transceiver and a second physical layer transceiver. The apparatus further includes a frame interleaver that is communicably coupled to each of the first and second physical layer transceivers. The frame interleaver is operable to interleave a protocol data unit (PDU) of high speed synchronous interface (HSI) frames across uplink lanes of the first physical layer transceiver and uplink lanes of the second physical layer transceiver according to a pipe offset.

Abstract translation: 一种包括用于高速同步接口（HSI）帧交织的双物理层收发器的装置。 该装置包括第一物理层收发器和第二物理层收发器。 该装置还包括可交换地耦合到第一和第二物理层收发器中的每一个的帧交织器。 帧交织器可操作以根据管偏移来交织高速同步接口（HSI）帧的协议数据单元（PDU），跨第一物理层收发器的上行链路通道和第二物理层收发器的上行链路通道。

公开(公告)号：US20130019038A1

公开(公告)日：2013-01-17

申请号：US13352163

申请日：2012-01-17

Applicant: Hans Georg Gruber ,  Julio Arceo ,  Magesh Hariharan ,  Suren Mohan ,  Mark A. Landguth

Inventor： Hans Georg Gruber ,  Julio Arceo ,  Magesh Hariharan ,  Suren Mohan ,  Mark A. Landguth

IPC: G06F13/14

CPC classification number: H04L12/40013

Abstract: Methods, systems, apparatuses, and computer-readable media for controlling components connected to and/or otherwise associated with a data bus are presented. According to one or more aspects of the disclosure, a plurality of processing devices having data bus management capability and at least one data bus associated with the plurality of processing devices may be identified. Subsequently, an inter-processor communication (IPC) layer for communication between the plurality of processing devices and the at least one data bus may be established over a messaging layer utilized by the at least one data bus. At least one component associated with the at least one data bus may then be controlled via the IPC layer using at least one of the plurality of processing devices.

Abstract translation: 提出了用于控制连接到数据总线和/或以其他方式与数据总线相关联的组件的方法，系统，装置和计算机可读介质。 根据本公开的一个或多个方面，可以识别具有数据总线管理能力的多个处理设备和与多个处理设备相关联的至少一个数据总线。 随后，可以通过由至少一个数据总线使用的消息传递层来建立用于在多个处理设备和至少一个数据总线之间通信的处理器间通信（IPC）层。 然后可以使用多个处理设备中的至少一个通过IPC层来控制与至少一个数据总线相关联的至少一个组件。