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公开(公告)号：US11437440B2
公开(公告)日：2022-09-06
申请号：US16963346
申请日：2019-09-27
Inventor： Can Yuan , Yongqian Li , Pan Xu , Zhidong Yuan , Meng Li , Xuehuan Feng , Zehua Ding
IPC: H01L29/08 , H01L27/32 , G09G3/3225
Abstract: An array substrate includes an array of a plurality of subpixels including a plurality of columns of subpixels respectively spaced apart by a plurality of inter-subpixel regions; a plurality of pixel driving circuits respectively driving light emission of the plurality of subpixels; and a plurality of detection and compensation lead lines respectively configured to respectively detect signals in the plurality of subpixels and respectively compensate signals in the plurality of subpixels. A respective one of a plurality of detection and compensation lead lines is disposed in a first inter-subpixel region between two directly adjacent columns of subpixels. The respective one of the plurality of detection and compensation lead lines is spaced apart by at least one columns of subpixels from a signal line configured to transmit an alternating current and arranged along a direction parallel to the respective one of the plurality of detection and compensation lead lines.
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公开(公告)号：US11361715B1
公开(公告)日：2022-06-14
申请号：US17352319
申请日：2021-06-20
Inventor： Xuehuan Feng , Yongqian Li , Pan Xu
IPC: G09G3/36 , G09G3/3266 , G09G3/3225 , G11C19/28 , H03K19/20
Abstract: The present disclosure provides a shift register unit, a gate driving circuitry and a method for driving the gate driving circuitry. The shift register unit includes an input circuitry, a first latch circuitry, a second latch circuitry and an output end. The input circuitry is configured to output an input control signal to the first latch circuitry in accordance with a first level signal, a second level signal and a first ON signal. The first latch circuitry is configured to output an output signal as a gate driving signal via the output end in accordance with a first clock signal and the input control signal, and latch the output signal. The second latch circuitry is configured to output a second ON signal in accordance with a second clock signal and the output signal, and latch the second ON signal.
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公开(公告)号：US11341923B2
公开(公告)日：2022-05-24
申请号：US17206121
申请日：2021-03-19
Inventor： Zhidong Yuan , Pan Xu , Yongqian Li , Can Yuan
IPC: G09G3/3266 , G11C19/28 , G09G3/3233
Abstract: The present disclosure relates to the field of display technology, and provides a shift register unit and a driving method thereof, a gate driving circuit, and a display panel. The shift register unit includes: an input circuit, a charging circuit, an inverter circuit, an output circuit, and a pull-down circuit. The input circuit is connected to a second clock signal terminal, a signal input terminal and a first node. The inverter circuit is connected to the signal input terminal, the second clock signal terminal, a first power supply terminal, a second power supply terminal and a pull-down node. The output circuit is connected to the pull-up node, the first power supply terminal and an output terminal. The pull-down circuit is connected to the pull-down node, the second power supply terminal, the pull-up node, and the output terminal.
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14.发明授权公开(公告)号：US11935469B2
公开(公告)日：2024-03-19
申请号：US17620195
申请日：2020-12-23
Inventor： Xuehuan Feng , Yongqian Li , Pan Xu , Zhongyuan Wu
IPC: G09G3/3275 , G09G3/3233 , G09G3/3266
CPC classification number: G09G3/3233 , G09G3/3266 , G09G2300/0426 , G09G2300/0842 , G09G2300/0861 , G09G2320/0233 , G09G2320/0257
Abstract: A pixel circuit array, a display panel, a method for driving a pixel circuit array, and a method for driving a display panel are provided. The pixel circuit array may include: a first signal sensing line (SENSE1) and a second signal sensing line (SENSE2); and N pixel circuits arranged in a column. All of the N pixel circuits are divided into a first group and a second group, each pixel circuit in the first group is coupled to the first signal sensing line (SENSE1), and each pixel circuit in the second group is coupled to the second signal sensing line (SENSE2) different from the first signal sensing line (SENSE1), where N is a positive integer greater than 1.
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公开(公告)号：US12250867B2
公开(公告)日：2025-03-11
申请号：US17791262
申请日：2021-09-28
Inventor： Zhidong Yuan , Pan Xu , Yongqian Li , Can Yuan
IPC: H10K59/88 , G01R31/28 , G09G3/3233 , G09G3/3266 , H10K71/70
Abstract: A display panel, and a test method thereof, a display apparatus, each subpixel of the pixel array of the display panel includes a pixel circuit, a first signal line configured to provide a scanning signal to the pixel circuit, a scan driver circuit configured to provide the scanning signal to the pixel circuit and includes a shift register and a clock signal line in the display area; a test circuit board in the non-display area and including a test pad; and a test lead in the non-display area and electrically connected with the test pad. The first signal line includes a first part in the display area and a second part in the non-display area, the first part extends substantially along the first direction.
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Patent Agency Ranking
公开(公告)号：US12211448B2
公开(公告)日：2025-01-28
申请号：US17779164
申请日：2021-03-29
Inventor： Zhidong Yuan , Pan Xu , Yongqian Li , Can Yuan , Zhongyuan Wu
IPC: G11C19/00 , G09G3/32 , G09G3/3266 , G11C19/28
Abstract: A display panel includes sub-pixels and a scan driving circuit. The scan driving circuit includes a plurality of stages of shift registers including at least one first shift register and at least one second shift register, and a plurality of clock signal lines including at least one first sub-clock signal line and at least one second sub-clock signal line. Each shift register includes a first sub-circuit and a second sub-circuit. A first sub-clock signal line in the at least one first sub-clock signal line is electrically connected to a first sub-circuit in a first shift register in the at least one first shift register. A second sub-clock signal line in the at least one second sub-clock signal line is electrically connected to one sub-circuit of a first sub-circuit and a second sub-circuit in a second shift register in the at least one second shift register.
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公开(公告)号：US20240057407A1
公开(公告)日：2024-02-15
申请号：US17754369
申请日：2021-04-30
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan , Pan Xu
IPC: H10K59/131 , H10K59/121
CPC classification number: H10K59/131 , H10K59/1213 , H10K59/1216
Abstract: A display substrate and a display device are provided. The display substrate includes: a plurality of pixel units arranged on a base substrate, each pixel unit includes a plurality of sub-pixels, and each sub-pixel includes a light emitting element and a pixel driving circuit; a semiconductor layer arranged on the base substrate; a first conductive layer arranged on a side of the semiconductor layer; and a second conductive layer arranged on another side of the semiconductor layer. The pixel driving circuit includes a driving transistor, a switching transistor and a sensing transistor; the switching transistor includes a first gate electrode and a first active layer; the display substrate further includes a channel defining portion for defining a channel region of the switching transistor, and an orthographic projection of the channel defining portion substrate at least partially overlaps an orthographic projection of the first active layer on the base substrate.
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18.发明授权公开(公告)号：US11817028B2
公开(公告)日：2023-11-14
申请号：US18077269
申请日：2022-12-08
Inventor： Xuehuan Feng , Pan Xu
CPC classification number: G09G3/20 , G11C19/28 , G09G2300/0426 , G09G2310/0267 , G09G2310/0286 , G09G2310/08 , H01L27/124 , H01L27/1255
Abstract: The present disclosure relates to the field of display technology, and in particular, to a gate driving structure, an array substrate and a display device. The gate driving structure may include: a base substrate; a shift register, formed on the base substrate, and including a plurality of thin film transistors and at least one capacitor, the capacitor being coupled to the thin film transistor; and a signal wiring group, formed on the base substrate, and including a plurality of signal wirings spaced apart from each other, the signal wiring being coupled to the thin film transistor. An orthographic projection of the capacitor on the base substrate is at least partially overlapped with an orthographic projection of the signal wiring group on the base substrate.
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公开(公告)号：US20230157111A1
公开(公告)日：2023-05-18
申请号：US17795950
申请日：2021-09-28
Inventor： Pan Xu , Zhidong Yuan
IPC: H10K59/131 , G09G3/3233 , H10K59/122
CPC classification number: H10K59/1315 , G09G3/3233 , H10K59/122 , G09G2300/0842 , G09G2300/0819 , G09G2300/0426
Abstract: A display substrate is provided. The display substrate includes: a base substrate including a display area and a peripheral area located on at least a first side of the display area; a plurality of pixel units arranged in an array along a first direction and a second direction in the display area of the base substrate, where the pixel units include a pixel driver circuit and a light-emitting device electrically connected to the pixel driver circuit, and the light-emitting device includes a cathode, an anode, and a light-emitting layer disposed between the cathode and the anode; and a cathode line located in the peripheral area and electrically connected to the cathode. The cathode line substantially surrounds the display area and is electrically connected to the cathode line at a plurality of positions. The cathode line includes a first cathode sub-line located in the same layer as the anode.
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公开(公告)号：US20220180816A1
公开(公告)日：2022-06-09
申请号：US17680956
申请日：2022-02-25
Inventor： Zhidong YUAN , Yongqian Li , Can Yuan , Pan Xu
IPC: G09G3/3275 , H01L27/32
Abstract: Provided is a display substrate. The display substrate includes two pixels arranged along a first direction and adjacent to each other on a base substrate, and a pixel circuit in each of the two pixels includes a drive transistor, a first reset transistor, and a second reset transistor. A display device is also provided.
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