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公开(公告)号:US20220261262A1
公开(公告)日:2022-08-18
申请号:US17609158
申请日:2020-04-24
Applicant: Hitachi Astemo, Ltd.
Inventor: Kazuyoshi SERIZAWA , Tomohito EBINA
Abstract: A hypervisor of an embedded device switches CPU resources allocated to each virtual machine. CPU cores are allocated to the respective virtual machines so as to overlap each other by an adjustment margin between the guest OSs for which the number of CPU cores needs to be adjusted. For the CPU cores allocated in an overlapping manner, a CPU time is given to only one OS (the other OS is not operated). When the load between the guest OSs changes, the guest OS/virtual machine to which the CPU time is given is switched. Further, for example, control of allocating a dummy process is performed so that the guest OS to which it is not possible to allocate a CPU time due to switching does not allocate a real process.
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公开(公告)号:US20220204007A1
公开(公告)日:2022-06-30
申请号:US17604836
申请日:2020-04-03
Applicant: Hitachi Astemo, Ltd.
Inventor: Ryo TSUCHIYA , Kazuyoshi SERIZAWA , Tomohito EBINA
IPC: B60W50/035 , B60W60/00 , B60W40/105
Abstract: Provided are a vehicle control device and a computer program capable of simplifying design of state transition. An intermediate layer constituting an ECU divides a state of a lower-layer state machine for each function of a vehicle system in association with the state of the lower-layer state machine, and outputs the state to an upper-layer state machine, a state transition table of the upper-layer state machine includes, as a condition of state transition of the upper-layer state machine, a current state of a lower-layer state machine or a state to transition, and the upper-layer state machine receives the state of the lower-layer state machine input from the intermediate layer, refers to the state transition table, and outputs a signal for controlling the vehicle system.
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公开(公告)号:US20240241747A1
公开(公告)日:2024-07-18
申请号:US18559513
申请日:2022-02-04
Applicant: Hitachi Astemo, Ltd.
Inventor: Masashi MIZOGUCHI , Tomohito EBINA , Kazuyoshi SERIZAWA , Kenichi OSADA , Tasuku ISHIGOOKA , Takeshi FUKUDA
IPC: G06F9/455
CPC classification number: G06F9/45558 , G06F2009/45579 , G06F2009/45591
Abstract: An electronic controller includes: a virtual machine that accesses a first virtual driver to execute a process; a hypervisor that calls a first real driver of a first peripheral, based on a peripheral access request received from the first virtual driver; an access recording unit that calls the first virtual driver to record a peripheral access request transmitted to the hypervisor; a state recording unit that calls the first real driver to record a state of a register of the first peripheral; and a monitoring unit that monitors an operation of the hypervisor. The monitoring unit determines an abnormality of the hypervisor, based on a record by the access recording unit and on a record by the state recording unit.
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公开(公告)号:US20240199073A1
公开(公告)日:2024-06-20
申请号:US18555718
申请日:2022-02-04
Applicant: Hitachi Astemo, Ltd.
Inventor: Hiroki MAEHAMA , Hiroaki ITO , Takeshi YAMADA , Koji MAEDA , Kazuyoshi SERIZAWA
CPC classification number: B60W60/001 , B60W50/04 , B60W2530/00 , B60W2554/00
Abstract: An electronic control device that executes arithmetic processing for controlling an operation of a vehicle includes: a determination unit that is connected to one or a plurality of electronic devices that recognize an external environment on the basis of information of a sensor provided in the vehicle and determines an operation of the vehicle on the basis of external recognition information transmitted from the electronic devices; and a functional boundary change determination unit that determines changes in functions of the electronic control device and the electronic devices if it is determined that a processing load of the electronic control device is high.
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公开(公告)号:US20230306796A1
公开(公告)日:2023-09-28
申请号:US18041701
申请日:2021-06-14
Applicant: HITACHI ASTEMO, LTD.
Inventor: Ryo TSUCHIYA , Kazuyoshi SERIZAWA , Koji MAEDA
IPC: G07C5/00
CPC classification number: G07C5/008
Abstract: The present invention addresses the problem of reducing the processor load of an integrated circuit that processes information aggregated in a zone architecture. A network engine (210) of this vehicle control device receives data containing a plurality of pairs of the information and a source address of the information according to a first communication protocol (Protocol A). The network engine (210) identifies a communication protocol (Protocol B, C) of a communication interface of a destination integrated circuit (SoC 220) corresponding to the source address of each item of the information. The network engine (210) sorts the information for each identified communication protocol, converts the sorted information into data of the identified communication protocol, and transmits each converted data item to the destination integrated circuit via the communication interface of the destination integrated circuit.
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