公开(公告)号：US20170263786A1

公开(公告)日：2017-09-14

申请号：US15605779

申请日：2017-05-25

Applicant: IDEMITSU KOSAN CO., LTD.

Inventor： Shigekazu TOMAI ,  Masatoshi SHIBATA ,  Emi KAWASHIMA ,  Koki YANO ,  Hiromi HAYASAKA

IPC: H01L29/872 ,  H01L29/26 ,  H01L29/24

CPC classification number: H01L29/872 ,  H01L29/04 ,  H01L29/24 ,  H01L29/247 ,  H01L29/26 ,  H01L29/47 ,  H01L29/66969 ,  H01L29/861

Abstract: A schottky barrier diode element having a silicon (Si) substrate, an oxide semiconductor layer and a schottky electrode layer, wherein the oxide semiconductor layer includes a polycrystalline and/or amorphous oxide semiconductor having a band gap of 3.0 eV or more and 5.6 eV or less.

公开(公告)号：US20170141240A1

公开(公告)日：2017-05-18

申请号：US15392540

申请日：2016-12-28

Applicant: IDEMITSU KOSAN CO., LTD.

Inventor： Shigekazu TOMAI ,  Masatoshi SHIBATA ,  Emi KAWASHIMA ,  Koki YANO ,  Hiromi HAYASAKA

IPC: H01L29/872 ,  H01L29/47 ,  H01L29/04 ,  H01L29/267 ,  H01L29/16 ,  H01L29/24

CPC classification number: H01L29/872 ,  H01L29/04 ,  H01L29/16 ,  H01L29/24 ,  H01L29/247 ,  H01L29/26 ,  H01L29/267 ,  H01L29/47

Abstract: A Schottky barrier diode element includes an n-type or p-type silicon (Si) substrate, an oxide semiconductor layer, and a Schottky electrode layer, the oxide semiconductor layer including either or both of a polycrystalline oxide that includes gallium (Ga) as the main component and an amorphous oxide that includes gallium (Ga) as the main component.

公开(公告)号：US20250081540A1

公开(公告)日：2025-03-06

申请号：US18950230

申请日：2024-11-18

Applicant: Japan Display Inc. ,  IDEMITSU KOSAN CO., LTD.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU ,  Emi KAWASHIMA ,  Yuki TSURUMA ,  Daichi SASAKI

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/06 ,  H01L29/49

Abstract: A thin film transistor includes an oxide semiconductor layer having a polycrystalline structure over a substrate, a gate electrode over the oxide semiconductor layer, and a gate insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a first region having a first carrier concentration and overlapping the gate electrode, a second region having a second carrier concentration and not overlapping the gate electrode, and a third region between the first region and the second region and overlapping the gate electrode. The second carrier concentration is larger than the first carrier concentration. A carrier concentration of the third region decreases from the second region to the first region in a channel length direction. A length of the third region is greater than or equal to 0.00 μm and less than or equal to 0.60 μm in the channel length direction.

公开(公告)号：US20250015196A1

公开(公告)日：2025-01-09

申请号：US18889394

申请日：2024-09-19

Applicant: Japan Display Inc. ,  IDEMITSU KOSAN CO., LTD.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU ,  Emi KAWASHIMA ,  Yuki TSURUMA ,  Daichi SASAKI

IPC: H01L29/786 ,  H01L29/66

Abstract: A thin film transistor includes a metal oxide layer over the substrate, an oxide semiconductor layer having crystallinity in contact with the metal oxide layer, a gate electrode overlapping the oxide semiconductor layer, and an insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a plurality of crystal grains. Each of the plurality of crystal grains includes at least one of a crystal orientation , a crystal orientation , and a crystal orientation obtained by an EBSD method. In occupancy rates of crystal orientations calculated based on measurement points having crystal orientations with a crystal orientation difference greater than or equal to 0 degrees and less than or equal to 15 degrees with respect to a normal direction of a surface of the substrate, an occupancy rate of the crystal orientation is less than or equal to 5%.

公开(公告)号：US20250006783A1

公开(公告)日：2025-01-02

申请号：US18830651

申请日：2024-09-11

Applicant: Japan Display Inc. ,  IDEMITSU KOSAN CO., LTD.

Inventor： Hajime WATAKABE ,  Masashi TSUBUKU ,  Toshinari SASAKI ,  Takaya TAMARU ,  Emi KAWASHIMA ,  Yuki TSURUMA ,  Daichi SASAKI

IPC: H01L29/04 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

Abstract: A thin film transistor includes an oxide semiconductor layer having crystallinity over a substrate, a gate electrode overlapping the oxide semiconductor layer, and an insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a plurality of crystal grains. Each of the plurality of crystal grains includes at least one of a crystal orientation , a crystal orientation , and a crystal orientation obtained by an EBSD method. In occupancy rates of crystal orientations calculated based on measurement points having crystal orientations with a crystal orientation difference greater than or equal to 0 degrees and less than or equal to 15 degrees with respect to a normal direction of a surface of the substrate, an occupancy rate of the crystal orientation is greater than an occupancy rate of the crystal orientation and an occupancy rate of the crystal orientation .

公开(公告)号：US20160211386A1

公开(公告)日：2016-07-21

申请号：US14912800

申请日：2014-08-08

Applicant: IDEMITSU KOSAN CO., LTD.

Inventor： Shigekazu TOMAI ,  Masatoshi SHIBATA ,  Emi KAWASHIMA ,  Koki YANO ,  Hiromi HAYASAKA

IPC: H01L29/872 ,  H01L29/47 ,  H01L29/24

CPC classification number: H01L29/872 ,  H01L29/04 ,  H01L29/16 ,  H01L29/24 ,  H01L29/247 ,  H01L29/26 ,  H01L29/267 ,  H01L29/47

Abstract: A Schottky barrier diode element includes an n-type or p-type silicon (Si) substrate, an oxide semiconductor layer, and a Schottky electrode layer, the oxide semiconductor layer including either or both of a polycrystalline oxide that includes gallium (Ga) as the main component and an amorphous oxide that includes gallium (Ga) as the main component.

Abstract translation: 肖特基势垒二极管元件包括n型或p型硅（Si）衬底，氧化物半导体层和肖特基电极层，所述氧化物半导体层包括含有镓（Ga）的多晶氧化物中的一种或两种 主要成分和包含镓（Ga）作为主要成分的无定形氧化物。