公开(公告)号：US20210083801A1

公开(公告)日：2021-03-18

申请号：US17108386

申请日：2020-12-01

Applicant: INPHI CORPORATION

Inventor： Benjamin P. SMITH ,  Jamal RIANI ,  Arash FARHOODFAR ,  Sudeep BHOJA

IPC: H04L1/00 ,  H03M13/19 ,  H03M13/25 ,  H03M13/29

Abstract: The present invention relates to data communication systems and methods thereof. More specifically, embodiments of the present invention provide a data transmission method. Data are encoded with staircase encoder, and staircase coded blocks are first interleaved then combined into outer code frames. Code frames additionally include sync words and padding bits. A second interleaving is applied to the bits of the code frames, and Hamming encoding is performed on the output of the second interleaver. Hamming codewords are Gray-mapped to dual-polarized quadrature-amplitude-modulation (DP-QAM) symbols, and a third interleaving of the symbols from a set of successive Hamming codewords is performed. Pilot symbols are inserted periodically into the stream of DP-QAM symbols. There are other embodiments as well.

公开(公告)号：US20200220563A1

公开(公告)日：2020-07-09

申请号：US16827355

申请日：2020-03-23

Applicant: INPHI CORPORATION

Inventor： Jamal RIANI ,  Farshid Rafiee RAD ,  Benjamin P. SMITH ,  Yu LIAO ,  Sudeep BHOJA

IPC: H03M13/39 ,  H04L1/00

Abstract: The present invention is directed to data communication. More specifically, an embodiment of the present invention provides an error correction system. Input data signals are processed by a feedforward equalization module and a decision feedback back equalization module. Decisions generated by the decision feedback equalization module are processed by an error detection module, which determines error events associated with the decisions. The error detection module implements a reduced state trellis path. There are other embodiments as well.

公开(公告)号：US20190319741A1

公开(公告)日：2019-10-17

申请号：US16451986

申请日：2019-06-25

Applicant: INPHI CORPORATION

Inventor： Benjamin P. SMITH ,  Arash FARHOODFAR

IPC: H04L1/00 ,  H04B10/516 ,  H04B10/532 ,  H03M13/29 ,  H04B10/54 ,  H04B10/50 ,  H04B10/69

Abstract: An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 64 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.

公开(公告)号：US20190268091A1

公开(公告)日：2019-08-29

申请号：US16403408

申请日：2019-05-03

Applicant: INPHI CORPORATION

Inventor： Jamal RIANI ,  Benjamin P. SMITH ,  Volodymyr SHVYDUN ,  Sudeep BHOJA ,  Arash FARHOODFAR

IPC: H04L1/00 ,  H03M13/29 ,  H04B14/02

Abstract: The present invention is directed to data communication systems and techniques thereof. More specifically, embodiments of the present invention provide an FEC encoder that generates parity symbols that are embedded into FEC blocks. An FEC decoder determines whether to perform error correction based on the parity symbols. When performing error correction, the decoder selects a worst symbol from a segment of symbols, and the worst symbol is corrected. There are other embodiments as well.

公开(公告)号：US20180102852A1

公开(公告)日：2018-04-12

申请号：US15836603

申请日：2017-12-08

Applicant: INPHI CORPORATION

Inventor： Benjamin P. SMITH ,  Jamal RIANI ,  Sudeep BHOJA ,  Arash FARHOODFAR ,  Vipul BHATT

IPC: H04B10/58 ,  H04B10/69 ,  H04B10/2507 ,  H04B10/516

CPC classification number: H04B10/58 ,  H04B10/2507 ,  H04B10/5161 ,  H04B10/541 ,  H04B10/697 ,  H04B10/6971

Abstract: A circuit and method for mitigating multi-path interference in direct detection optical systems is provided. Samples of an optical signal having a pulse amplitude modulated (PAM) E-field are processed by generating a PAM level for each sample. For each sample, the sample is subtracted from the respective PAM level to generate a corresponding error sample. The error samples are lowpass filtered to produce estimates of multi-path interference (MPI). For each sample, one of the estimates of MPI is combined with the sample to produce an interference-mitigated sample.

公开(公告)号：US20170230140A1

公开(公告)日：2017-08-10

申请号：US15494366

申请日：2017-04-21

Applicant: Inphi Corporation

Inventor： Benjamin P. SMITH ,  Arash FARHOODFAR

IPC: H04L1/00 ,  H03M13/29 ,  H04B10/532 ,  H04B10/69 ,  H04B10/54 ,  H04B10/516

CPC classification number: H04L1/0044 ,  H03M13/2906 ,  H04B10/50 ,  H04B10/516 ,  H04B10/5161 ,  H04B10/532 ,  H04B10/541 ,  H04B10/697 ,  H04L1/0041 ,  H04L1/0045 ,  H04L1/0058 ,  H04L1/006 ,  H04L1/0065

Abstract: An optical module processes first FEC (Forward Error Correction) encoded data produced by a first FEC encoder. The optical module has a second FEC encoder for further coding a subset of the first FEC encoded data to produce second FEC encoded data. The optical module also has an optical modulator for modulating, based on a combination of the second FEC encoded data and a remaining portion of the first FEC encoded data that is not further coded, an optical signal for transmission over an optical channel. The second FEC encoder is an encoder for an FEC code that has a bit-level trellis representation with a number of states in any section of the bit-level trellis representation being less than or equal to 64 states. In this manner, the second FEC encoder has relatively low complexity (e.g. relatively low transistor count) that can reduce power consumption for the optical module.

公开(公告)号：US20160380784A1

公开(公告)日：2016-12-29

申请号：US15260692

申请日：2016-09-09

Applicant: INPHI CORPORATION

Inventor： Stephane DALLAIRE ,  Benjamin P. SMITH ,  Travis William LOVITT ,  Arash FARHOODFAR

IPC: H04L25/03 ,  H04L25/06 ,  H04B1/10 ,  H04L12/26

CPC classification number: H04L25/03019 ,  H04B1/10 ,  H04L25/03057 ,  H04L25/061 ,  H04L43/028 ,  H04L2025/03363 ,  H04Q2213/03

Abstract: Receiver circuitry is disclosed that can take circuit branches offline to possibly adapt an offset value. In one embodiment, a circuit in a receiver has at least two branches. Each branch includes an adjustor to adjust the branch signal by an offset value. Selection circuitry takes one of the branches offline by selecting the output of that branch as an offline value, and by selecting the output of one or more of the other branches as a data decision value. The selection circuitry changes which branch is taken offline during the operation of the circuit. When a branch is taken offline, an offset value associated with that branch may be updated, if necessary.

Abstract translation: 公开了可以使电路分支离线以适应偏移值的接收器电路。 在一个实施例中，接收器中的电路具有至少两个分支。 每个分支包括调整器，以通过偏移值来调整分支信号。 选择电路通过选择该分支的输出作为离线值，并通过选择一个或多个其他分支的输出作为数据判定值，使其中一个分支离线。 选择电路在电路运行期间改变哪个分支脱机。 当分支脱机时，如果需要，可以更新与该分支相关联的偏移值。